hdlcc provides a Python API between a VHDL project and some HDL compilers to
catch errors and warnings the compilers generate that can be used to populate
syntax checkers and linters of text editors.
hdlcc automates tasks when possible. Currently, this means
- Taking dependencies into account when building so you don't need to provide a source list ordered by hand.
- Finding and rebuilding sources and design units that the compiler says are out of date (typically rebuilding sources that depend on package that has been changed)
- Easily switch between different compilers
This is mostly up to you. Common methods:
-
Git submodule
$ cd your/repo/path $ git submodule add https://github.com/suoto/hdlcc your/repo/submodules/path $ git submodule update --init --recursive -
Python distutils
$ git clone https://github.com/suoto/hdlcc $ pip install hdlcc
hdlcc requires a configuration file listing libraries, source files, build flags,
etc. See the wiki for
details on how to write it.
Besides that, it can be used standalone or within Python.
Installing hdlcc via pip allows running it as a standalone command.
$ hdlcc -h
usage: hdlcc [-h] [--verbose] [--clean] [--build]
[--sources [SOURCES [SOURCES ...]]] [--debug-print-sources]
[--debug-print-compile-order] [--debug-parse-source-file]
[--debug-run-static-check]
[--debug-profiling [OUTPUT_FILENAME]]
project_file
positional arguments:
project_file Configuration file that defines what should be built
(lists sources, libraries, build flags and so on
optional arguments:
-h, --help show this help message and exit
--verbose, -v Increases verbose level. Use multiple times to
increase more
--clean, -c Cleans the project before building
--build, -b Builds the project given by <project_file>
--sources [SOURCES [SOURCES ...]], -s [SOURCES [SOURCES ...]]
Source(s) file(s) to build individually
--debug-print-sources
--debug-print-compile-order
--debug-parse-source-file
--debug-run-static-check
--debug-profiling [OUTPUT_FILENAME]Full API docs are not yet available. The example below should get you started, if you need more info, check the code or open an issue at the issue tracker requesting help.
-
Subclass the
HdlCodeCheckerBaseclass fromhdlcc.code_checker_basefrom hdlcc.code_checker_base import HdlCodeCheckerBase class StandaloneProjectBuilder(HdlCodeCheckerBase): _ui_logger = logging.getLogger('UI') def handleUiInfo(self, message): self._ui_logger.info(message) def handleUiWarning(self, message): self._ui_logger.warning(message) def handleUiError(self, message): self._ui_logger.error(message)
-
Create a project object passing the configuration file as a parameter (for static checks only, no configuration file is needed). This triggers the project to be built in background
project = StandaloneProjectBuilder('path/to/config/file') project.waitForBuild()
-
You can now build a single file and get records that describe the messages it returns
for record in project.getMessagesByPath('path/to/the/source'): print "[{error_type}-{error_number}] @ " \ "({line_number},{column}): {error_message}"\ .format(**record)
That should return something like
```
[E-None] @ (83,30): no declaration for "integer_vector"
[E-None] @ (83,30): no declaration for "integer_vector"
[W-0] @ (29,14): constant 'ADDR_WIDTH' is never used
```
(The example above uses GHDL to build suoto/hdl_lib/code/memory/testbench/async_fifo_tb.vhd)
Tools with experimental support (need more testing):
Tools with planned support:
| System | CI integration | CI status |
|---|---|---|
| Linux | Yes | |
| Windows | Yes | |
| OSX | No | N/A |
- Vim: vim-hdl
- Komodo: Komodo HDL Lint. on hold
Style checks are independent of a third-party compiler. Checking includes:
- Unused signals, constants, generics, shared variables, libraries, types and attributes
- Comment tags (
FIXME,TODO,XXX)
Notice that currently the unused reports has caveats, namely declarations with
the same name inherited from a component, function, procedure, etc. In the
following example, the signal rdy won't be reported as unused in spite of the
fact it is not used.
signal rdy, refclk, rst : std_logic;
...
idelay_ctrl_u : idelay_ctrl
port map (rdy => open,
refclk => refclk,
rst => rst);You can use the issue tracker for bugs, feature request and so on.
This software is licensed under the GPL v3 license.
Mentor Graphics®, ModelSim® and their respective logos are trademarks or registered trademarks of Mentor Graphics, Inc.
Altera® and its logo is a trademark or registered trademark of Altera Corporation.
Xilinx® and its logo is a trademark or registered trademark of Xilinx, Inc.
hdlcc's author has no connection or affiliation to any of the trademarks mentioned
or used by this software.