DE1SOC DE10-NANO DE10-Standard OpenCL hardware that support VGA and desktop. And Some applications such as usb camera YUYV to RGB , Sobel and so on.

A cross platform C99 library to get cpu features at runtime.

UVM interactive debug library

Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server

🌊 Digital timing diagram rendering engine

Vim script for text filtering and alignment

中文版 Parallel Programming for FPGAs

Generate filelist and slickedit for the compiled source file and depend header file for Linux Kernel and U-boot

Open Programmable Acceleration Engine

SCR1 is a high-quality open-source RISC-V MCU core in Verilog

v2ray/xray多用户管理部署程序

The Compute Library is a set of computer vision and machine learning functions optimised for both Arm CPUs and GPUs using SIMD technologies.

A convolutional neural network implemented in hardware (verilog)

A basic testbench made for educational purposes using SystemVerilog and the Universal Verification Methodology

Contains the code examples from The UVM Primer Book sorted by chapters.

DE1SoC VGA and Audio

An OpenCL-based FPGA Accelerator for Convolutional Neural Networks