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@ssteffl ssteffl commented Aug 25, 2020

  • gemmini cisc frontend and risc frontend co-exist
  • there is currently no way to remove either frontend
  • there are no special instructions to switch between the modes. the risc/cisc mode is inferred from the RoCC funct7 field
  • there are mechanisms in the Chisel to prevent the risc/cisc from issuing/commiting instructions at the same time
  • verified risc/cisc both work and can switch between on verilator using several gemm-rocc-tests bareMetalC tests

@ssteffl ssteffl requested review from alonamid and hngenc August 25, 2020 09:40
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alonamid commented Aug 26, 2020

Thanks for opening this PR!
I believe @hngenc will have a deeper look at the uarch tomorrow, but I have a few high level questions to start with:

  • Is the TilerController in come as an addition to the main controller, or as a replacement?
  • The most recent version of Gemmini support transposing a matrix before the GEMM. I'm assuming the Tiler does not support that right now?
  • I would have expected to see some changes in Configs.scala for a parameter that enables/disables the Tiler frontend elaboration. Am I missing something?
  • I'm wondering whether the CISC naming is the best name to go with here (as opposed to HWTiler or something like that). My concern is that CISC tend to generate an automatic reaction from people (whether Pro or Anti, but still, an automatic reaction). Any thoughts?

@ssteffl
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ssteffl commented Aug 26, 2020

Thanks for opening this PR!
I believe @hngenc will have a deeper look at the uarch tomorrow, but I have a few high level questions to start with:

  • Is the TilerController in come as an addition to the main controller, or as a replacement?

its a submodule that sits parallel to the existing LoopUnroller+ROB frontend. it could be renamed "TilerFrontend"

  • The most recent version of Gemmini support transposing a matrix before the GEMM. I'm assuming the Tiler does not support that right now?

transposing input matrices is not supported by the hardware tiler. that sounds like it would be a bit of work.

  • I would have expected to see some changes in Configs.scala for a parameter that enables/disables the Tiler frontend elaboration. Am I missing something?

sure you could add that, but i'm guessing the saved area will be fairly small

  • I'm wondering whether the CISC naming is the best name to go with here (as opposed to HWTiler or something like that). My concern is that CISC tend to generate an automatic reaction from people (whether Pro or Anti, but still, an automatic reaction). Any thoughts?

i dont care about the external branding of this addition. HWTiler is fine with me. the code has "cisc" 32 times, but can easily be sed'ed with "tiler" if desired

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Thanks, @ssteffl! This looks pretty good overall. I just left a few comments here. If you can respond to them, I think we can merge this by Friday night.

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hngenc commented Aug 29, 2020

The code LGTM. There's actually one last thing that I forgot to ask about before: Could you add a section to the README.md describing the format of the CISC instructions (somewhere underneath the ISA section perhaps)?

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Was this tested on FireSim with the various ResNet/MobileNet tests?

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ssteffl commented Aug 29, 2020

Was this tested on FireSim with the various ResNet/MobileNet tests?

the original, unmerged Tiler code was tested on FireSim for ResNet/MobileNet. However, FireSim was not run on the merged code in this PR.

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ssteffl commented Aug 29, 2020

The code LGTM. There's actually one last thing that I forgot to ask about before: Could you add a section to the README.md describing the format of the CISC instructions (somewhere underneath the ISA section perhaps)?

done

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hngenc commented Sep 1, 2020

We apparently pass on FireSim, so this looks good to merge.

@hngenc hngenc merged commit 1b6f288 into dev Sep 1, 2020
@hngenc hngenc deleted the gemmini-cisc branch January 21, 2022 17:35
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4 participants