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@agatti agatti commented Nov 4, 2025

Summary

This PR introduces a new generic ASM API function to clear a register (i.e. clearing all the registers' bits).

The native emitter used to perform a XOR operation to clear a given register, but different platform have more optimised method to achieve the same result taking up less space - either for the generated code or for the code generator itself.

Arm, RV32, X86, and X64 already had an already optimised generator and generated optimised code. The code generator when build for Thumb takes less space generating a constant immediate move rather than a XOR operation, even though both operations would distill down to a single narrow opcode. On Xtensa the situation is almost the same as Thumb, with the exception that a constant immediate move would take one byte less than a XOR operation.

Thumb builds should shrink down by a small amount (QEMU/MPS2_AN385 is 24 bytes smaller, for example), whilst the ESP8266 port should be 16 bytes smaller. QEMU/VIRT_RV32 and ESP32_GENERIC builds should show no size changes.

Testing

The full test suite passed locally on QEMU for SABRELITE, MPS2_AN385, and VIRT_RV32. On my repo's branch CI passes for Unix/x86 and Unix/x64. Xtensa and Xtensawin pass the test suite without additional failures (see Octoprobe run 359).

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Code size report:

Reference:  tests/serial_test.py: Allow up to 2 seconds between bytes. [2762fe6]
Comparison: py/emitnative: Optimise register clearing. [merge of 8e10d39]
  mpy-cross:   -16 -0.004% 
   bare-arm:    +0 +0.000% 
minimal x86:    +0 +0.000% 
   unix x64:    +0 +0.000% standard
      stm32:   -24 -0.006% PYBV10
     mimxrt:   -24 -0.006% TEENSY40
        rp2:   -24 -0.003% RPI_PICO_W
       samd:   -24 -0.009% ADAFRUIT_ITSYBITSY_M4_EXPRESS
  qemu rv32:    +0 +0.000% VIRT_RV32

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Codecov Report

✅ All modified and coverable lines are covered by tests.
⚠️ Please upload report for BASE (master@1e5da26). Learn more about missing BASE report.
⚠️ Report is 6 commits behind head on master.

Additional details and impacted files
@@            Coverage Diff            @@
##             master   #18363   +/-   ##
=========================================
  Coverage          ?   98.38%           
=========================================
  Files             ?      171           
  Lines             ?    22292           
  Branches          ?        0           
=========================================
  Hits              ?    21931           
  Misses            ?      361           
  Partials          ?        0           

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This commit introduces a new generic ASM API function to clear a
register (i.e. clearing all the registers' bits).

The native emitter used to perform a XOR operation to clear a given
register, but different platform have more optimised method to achieve
the same result taking up less space - either for the generated code or
for the code generator itself.

Arm, RV32, X86, and X64 already had an already optimised generator and
generated optimised code.  The code generator when build for Thumb takes
less space generating a constant immediate move rather than a XOR
operation, even though both operations would distill down to a single
narrow opcode.  On Xtensa the situation is almost the same as Thumb,
with the exception that a constant immediate move would take one byte
less than a XOR operation.

Signed-off-by: Alessandro Gatti <[email protected]>
@agatti agatti force-pushed the native-emitter-clear-register branch from 8c620de to 8e10d39 Compare November 13, 2025 02:55
@dpgeorge dpgeorge added the py-core Relates to py/ directory in source label Nov 13, 2025
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