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ports: Reduce pin structures footprint. #18414
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Code size report: |
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That is very substantial indeed.👏 |
This commit performs a minor change to the "pin_af_t" structure, changing the data type used to store alternate function pin name QSTRs in order to have a smaller impact on the .rodata section of the firmware. The data type used to store the QSTR name of the pin is changed from "qstr" to "qstr_short_t", that is able to store the same name string index but in half the size. Other pin-related structures in the port that also store QSTRs do not benefit from a narrower data type, as their members are mostly word-aligned and thus the linker is forced to insert padding bytes between entries. Signed-off-by: Alessandro Gatti <[email protected]>
This commit performs a few minor changes to the structures used to store
board pin information, in order to reduce the impact on the .rodata
section of the firmware of instances of those structures.
The data type used to store the QSTR name of alternate function pins
("machine_pin_af_obj_t") is changed from "qstr" to "qstr_short_t", that
is able to store the same name string index but in half the size.
Regular pin objects structure ("machine_pin_obj_t") instead has its QSTR
variable holder changed from "qstr" to "qstr_short_t", and some elements
of that structure have been rearranged to remove enough padding bytes
inside structure elements to let the linker allocate less data for
instances of that structure.
Signed-off-by: Alessandro Gatti <[email protected]>
This commit performs a few minor changes to the structures used to store
board pin information, in order to reduce the impact on the .rodata
section of the firmware of instances of those structures.
The pin objects structure ("machine_pin_obj_t") instead has its QSTR
variable holder changed from "qstr" to "qstr_short_t", and some elements
of that structure have been rearranged to remove enough padding bytes
inside structure elements to let the linker allocate less data for
instances of that structure.
Signed-off-by: Alessandro Gatti <[email protected]>
This commit performs a few minor changes to the structures used to store
board pin information, in order to reduce the impact on the .rodata
section of the firmware of instances of those structures.
The data type used to store the QSTR name of both regular and alternate
function pins ("machine_pin_obj_t" and "machine_pin_af_obj_t") is changed
from "qstr" to "qstr_short_t", that is able to store the same name string
index but in half the size.
Signed-off-by: Alessandro Gatti <[email protected]>
This commit performs a few minor changes to the structures used to store
board pin information, in order to reduce the impact on the .rodata
section of the firmware of instances of those structures.
The pin objects structure ("machine_pin_obj_t") instead has its QSTR
variable holder changed from "qstr" to "qstr_short_t", and some elements
of that structure have been rearranged to remove enough padding bytes
inside structure elements to let the linker allocate less data for
instances of that structure.
Signed-off-by: Alessandro Gatti <[email protected]>
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So, I've tried all permutations of the changes in the initial PR iteration and turns out that having mostly word-sized elements doesn't really help. Having structure members of smaller sizes could have led to more savings as forced halfword alignment could have been exploited for the structure, moving the word-sized members to a word boundary to keep things from breaking. Anyway, I've left the changes that had any real size impact, and I've split the initial single commit into per-port commits to provide better insight of the change in the repo's history. |
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Nice savings! For stm32, I think |
This commit performs a few minor changes to the structures used to store
board pin information, in order to reduce the impact on the .rodata
section of the firmware of instances of those structures.
The "pin_obj_t" structure, holding pin information, had an unused
word-sized field ("pull") that isn't used by any of the board
definitions, yet it takes up space in each pin structure being compiled
in the final firmware image.
Images for all available boards were built successfully with this
change, so there should be no unwanted issues arising from shrinking
that structure.
Signed-off-by: Alessandro Gatti <[email protected]>
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I'm not really familiar with each port's pin module implementation so I went for the low hanging fruit here, which also happens to be the safer route to take. Besides the potential STM32 changes (thanks!) which I'll look into soon, I've also noticed that nRF's |


Summary
This PR modifies the existing structure definitions for pin objects across selected ports, in order to reduce the overall footprint of each single pin instance.
There are two changes in this commit:
These changes should provide functionally equivalent binaries but with some minor size savings. The generated code for accessing a 16-bits quantity instead of a 32-bits one may or may not be much different from what was generated before, and there is a chance of either a very tiny speedup or a very tiny slowdown.
In any case, that would be probably detected in code that keeps creating pin instances that are looked up via name in a tight loop. That's very uncommon to see in production code anyway.
Results are promising, here's what I found:
Notes:
Size savings come from both the qstr type being narrow and in certain cases from structure repacking. In most cases structures contain mostly word-sized elements and there isn't much that can be done to maintain intra-structure member alignment.
Unless there are default GCC flags to let the compiler assume that all structures are packed, then repacking structures that will show up in .rodata could be an interesting source of size savings.
Testing
I've currently tested this on the two SAMD boards mentioned in the table, as the PR also touches the port's pins prefix file (see Octoprobe run 366 - the M0 failures are also present in the master branch, checked in Octoprobe run 367).
I plan to launch Octoprobe runs for each of the ports involved but I'll schedule them over time to not hog the server with a full 4hrs+ test run. The Reneses port has to be tested by somebody else as I have no means to test that in any reasonable way.
Trade-offs and Alternatives
The ports being affected still need more in-depth testing, although unless there's a compiler problem or non-standard structure member accesses happen when dealing with pin structures on MicroPython's side, these changes should be harmless.