1 search "vddmem", check

ums312

https://github.com/iscle/ums512_chipram/blob/W20.13.3/ddr/ddr_init/init/ddrc/r2p0/dram_support.c#L249

ums512

https://github.com/iscle/ums512_chipram/blob/W20.13.3//ddr/ddr_init/init/ddrc/r2p2/dram_support.c#L243

then modify config (DRAM_TYPE_FIXED) , unset DRAM_TYPE_AUTO_DETECT

2 modify ddr/cpu frequency

#define CLK_CORE0       CLK_1820M
#define CLK_CORE1       CLK_1820M
#define CLK_CORE2       CLK_1820M
#define CLK_CORE3       CLK_1820M
#define CLK_CORE4       CLK_1820M
#define CLK_CORE5       CLK_1820M
#define CLK_CORE6       CLK_1222M
#define CLK_CORE7       CLK_1222M
#define CLK_SCU         CLK_1404M
#define CLK_ACE         (CLK_SCU/2)

#define CLK_DDR_FREQ        1024000000
#define DDR_MODE	    0x0002

#define DCDC_MEM 1100
#ifdef CONFIG_NAND_SPL
#define DCDC_ARM	1000
#else
#define DCDC_ARM	1000
#endif

#define DCDC_CORE	750
#define DCDC_GPU	1000

3 change sml/teecfg/tos addr and size if needed

4 compile