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nrf: Disable SPIM3; add SPIM1; remove TWIM1 #1638

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Merged
merged 1 commit into from
Mar 12, 2019
Merged

nrf: Disable SPIM3; add SPIM1; remove TWIM1 #1638

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23 changes: 14 additions & 9 deletions ports/nrf/nrfx_config.h
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Original file line number Diff line number Diff line change
Expand Up @@ -10,9 +10,10 @@
#define NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1
#endif

// NOTE: THIS WORKAROUND CAUSES BLE CODE TO CRASH; tested on 2019-03-11.
// Turn on nrfx supported workarounds for errata in Rev1 of nRF52840
#ifdef NRF52840_XXAA
#define NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED 1
// #define NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED 1
#endif

// SPI
Expand All @@ -25,13 +26,17 @@
// We could write an interrupt handler that checks whether it's
// being used for SPI or I2C, but perhaps two I2C's and 1-2 SPI's are good enough for now.

// Enable SPIM2 and SPIM3 (if available)
// Enable SPIM1, SPIM2 and SPIM3 (if available)
// No conflict with TWIM0.
#define NRFX_SPIM1_ENABLED 1
#define NRFX_SPIM2_ENABLED 1
#ifdef NRF_SPIM3
#define NRFX_SPIM3_ENABLED 1
#else
#define NRFX_SPIM3_ENABLED 0
#endif
// DON'T ENABLE SPIM3 DUE TO ANOMALY WORKAROUND FAILURE (SEE ABOVE).
// #ifdef NRF52840_XXAA
// #define NRFX_SPIM_EXTENDED_ENABLED 1
// #define NRFX_SPIM3_ENABLED 1
// #else
// #define NRFX_SPIM3_ENABLED 0
// #endif


#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY 7
Expand All @@ -40,10 +45,10 @@
// QSPI
#define NRFX_QSPI_ENABLED 1

// TWI aka. I2C; enable TWIM0 and TWIM1 (no conflict with SPIM choices)
// TWI aka. I2C; enable a single bus: TWIM0 (no conflict with SPIM1 and SPIM2)
#define NRFX_TWIM_ENABLED 1
#define NRFX_TWIM0_ENABLED 1
#define NRFX_TWIM1_ENABLED 1
//#define NRFX_TWIM1_ENABLED 1

#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY 7
#define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY NRF_TWIM_FREQ_400K
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