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arch: Correctly set guest physical address space size for AMD - #8291

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rbradford merged 2 commits into
cloud-hypervisor:mainfrom
rhakobyan:sev_snp_address_space_fix
May 29, 2026
Merged

rbradford merged 2 commits into
cloud-hypervisor:mainfrom
rhakobyan:sev_snp_address_space_fix

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@rhakobyan

@rhakobyan rhakobyan commented May 29, 2026

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We've seen a guest boot hang when running VMs with Oak stage0 firmware on EC2 c6a.metal instances.

The root cause seems to be that cloud-hypervisor sets CPUID 0x80000008 PhysAddrSize (bits 7:0) to 43 (after SME c-bit reduction) but leaves GuestPhysAddrSize (bits 23:16) at the host default value of 48. Stage0 reads GuestPhysAddrSize to determine the guest address space and places PCI BARs near the top of 48-bit space.

  stage0 DEBUG:   BAR0: memory, 64-bit pref, size 524288
  stage0 DEBUG:     assigning [0x0000ff8000000000-0x0000ff8000080000)

Cloud-hypervisor's MMIO bus only covers 43 bits (mem64 area ends at 0x7ffffeeffff), so those devices are unreachable.

Failed moving device BAR: failed allocating new MMIO range: 0x7ffff800000->0xff8000000000(0x80000), keeping old BAR

The fix sets both CPUID fields to the same value.

With the second commit we get rid of the reduction to the physical address space size, which doesn't seem to be needed, and just cuts the address space to 43 bits.

rhakobyan added 2 commits May 28, 2026 19:52
When generating guest CPUID, we set PhysAddrSize (EAX bits 7:0)
based on the host's physical address bits. On AMD hosts with SME,
get_host_cpu_phys_bits() subtracts the c-bit reduction from this
value, but the code here only writes the result to bits 7:0 and
leaves GuestPhysAddrSize (bits 23:16) at the unmodified host value.
This creates a gap: e.g. PhysAddrSize=43 but GuestPhysAddrSize=48.

Guest firmware that reads GuestPhysAddrSize will see a larger
address space than the VMM provides, and may place PCI BARs beyond
the MMIO bus range. However, Cloud-hypervisor sizes its MMIO bus to
phys_bits.

Fix by setting both PhysAddrSize (bits 7:0) and GuestPhysAddrSize
(bits 23:16) to phys_bits, using mask 0xff00_ff00 instead of
0xffff_ff00.

Signed-off-by: Ruben Hakobyan <[email protected]>
get_host_cpu_phys_bits() subtracts the SME c-bit reduction from
PhysAddrSize (CPUID 0x80000008 EAX bits 7:0). The result sets the
guest's CPUID and MMIO address space size.

The c-bit reduction is not needed here. QEMU's equivalent
(host_cpu_phys_bits() in target/i386/host-cpu.c) returns
PhysAddrSize without reduction.

Signed-off-by: Ruben Hakobyan <[email protected]>
@rhakobyan
rhakobyan force-pushed the sev_snp_address_space_fix branch from 651e47b to 0862c5d Compare May 29, 2026 02:53
@rbradford rbradford changed the title Correctl set guest physical address space size for AMD arch: Correctly set guest physical address space size for AMD May 29, 2026

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Looks good and i've checked that this behaviour matches QEMU and kernel expections.

@rhakobyan
rhakobyan marked this pull request as ready for review May 29, 2026 10:51
@rhakobyan
rhakobyan requested a review from a team as a code owner May 29, 2026 10:51
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rbradford added this pull request to the merge queue May 29, 2026
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github-merge-queue Bot removed this pull request from the merge queue due to no response for status checks May 29, 2026
@rbradford
rbradford added this pull request to the merge queue May 29, 2026
Merged via the queue into cloud-hypervisor:main with commit 99f5537 May 29, 2026
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@rbradford rbradford added the bug-fix Bug fix to include in release notes label Jul 8, 2026
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2 participants