Spiflash large chip support #11
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Over 16MB, 32-bit addressing is required rather than the standard 24-bit.
| STATIC void mp_soft_qspi_write_cmd_addr_data(void *self_in, uint8_t cmd, uint32_t addr, uint8_t addr_bytes, size_t len, const uint8_t *src) { | ||
| mp_soft_qspi_obj_t *self = (mp_soft_qspi_obj_t*)self_in; | ||
| uint8_t cmd_buf[4] = {cmd, addr >> 16, addr >> 8, addr}; | ||
| uint32_t addr_buff = __REV(addr); |
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I don't think this will work: in 24-bit addressing mode only the 3 MSBytes will be sent, which is {addr>>24, addr>>16, addr>>8}, instead of the correct {addr>>16, addr>>8, addr}.
| CS_LOW(self); | ||
| mp_soft_qspi_transfer(self, 4, cmd_buf, NULL); | ||
| mp_soft_qspi_transfer(self, 1, &cmd, NULL); | ||
| mp_soft_qspi_transfer(self, addr_bytes, (uint8_t*)&addr_buff, NULL); |
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I would prefer to combine cmd and addr bytes to minimise the number of calls to mp_soft_qspi_transfer, to improve speed.
| const mp_spiflash_config_t *c = self->config; | ||
| if (c->bus_kind == MP_SPIFLASH_BUS_SPI) { | ||
| uint8_t buf[4] = {cmd, addr >> 16, addr >> 8, addr}; | ||
| uint8_t cmd = CMD_32_REQUIRED(addr) ? CMD_READ_32 : CMD_READ; |
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This function is called for things other than READ of flash, so the correct command should be passed in and just used without translation like this.
| // Provides the MPU_REGION_SIZE_X value when passed the size of region in bytes | ||
| // "m" must be a power of 2 between 32 and 4G (2**5 and 2**32) and this formula | ||
| // computes the log2 of "m", minus 1 | ||
| #define MPU_REGION_SIZE(m) (((m) - 1) / (((m) - 1) % 255 + 1) / 255 % 255 * 8 + 7 - 86 / (((m) - 1) % 255 + 12) - 1) |
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I'm happy to change to using BYTES instead of LOG2_BITS in the configuration. In that case this macro should be reused from sdram.c.
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Thanks for this. Because this is very tricky stuff I would like to split it up as much as possible into separate commits. I'm happy to do all the work (targeting master) and use this here as a reference. So no need to update the PR here. |
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This is superseded by upstream micropython#5166 |
Note: This is currently sitting on top of micropython#4669 so is likely to need rebasing, but it builds on top of spiflash updates in that branch so doesn't really target current master.
This PR provides support for (Q)SPI flash flash chips over 16MB / 128Mbit where 32bit addressing is required for the higher address ranges.
It also includes support for defining flash chip size in bytes in mpconfigboard rather than the log2 bit width currently needed by the stm drivers. I find this far more user friendly, but open to discussion.
There is also some minor reworking to the MPU configuration, again I'm very open to further discussion along these lines.
I have not yet tested this change with memory map enabled or with the mpu caching enabled (as configurable in new defines).
The first commit resolves micropython#4609