@@ -2759,10 +2759,10 @@ module Impl<FullStateConfigSig Config> {
27592759 )
27602760 }
27612761
2762- private AccessPathApprox getATail ( AccessPathApprox apa ) {
2763- exists ( TypedContent head , DataFlowType t |
2764- apa .isCons ( head , t , result ) and
2765- Stage5:: consCand ( head , t , result )
2762+ private predicate hasTail ( AccessPathApprox apa , DataFlowType t , AccessPathApprox tail ) {
2763+ exists ( TypedContent head |
2764+ apa .isCons ( head , t , tail ) and
2765+ Stage5:: consCand ( head , t , tail )
27662766 )
27672767 }
27682768
@@ -2808,7 +2808,7 @@ module Impl<FullStateConfigSig Config> {
28082808 private int countPotentialAps ( AccessPathApprox apa ) {
28092809 apa instanceof AccessPathApproxNil and result = 1
28102810 or
2811- result = strictsum ( AccessPathApprox tail | tail = getATail ( apa ) | countAps ( tail ) )
2811+ result = strictsum ( DataFlowType t , AccessPathApprox tail | hasTail ( apa , t , tail ) | countAps ( tail ) )
28122812 }
28132813
28142814 private newtype TAccessPath =
@@ -2817,16 +2817,17 @@ module Impl<FullStateConfigSig Config> {
28172817 exists ( AccessPathApproxCons apa |
28182818 not evalUnfold ( apa , false ) and
28192819 head = apa .getHead ( ) and
2820- tail .getApprox ( ) = getATail ( apa )
2820+ hasTail ( apa , _ , tail .getApprox ( ) )
28212821 )
28222822 } or
28232823 TAccessPathCons2 ( TypedContent head1 , TypedContent head2 , int len ) {
2824- exists ( AccessPathApproxCons apa |
2824+ exists ( AccessPathApproxCons apa , AccessPathApprox tail |
28252825 evalUnfold ( apa , false ) and
28262826 not expensiveLen1to2unfolding ( apa ) and
28272827 apa .len ( ) = len and
2828+ hasTail ( apa , _, tail ) and
28282829 head1 = apa .getHead ( ) and
2829- head2 = getATail ( apa ) .getHead ( )
2830+ head2 = tail .getHead ( )
28302831 )
28312832 } or
28322833 TAccessPathCons1 ( TypedContent head , int len ) {
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