Use SumsOf8 for AVX2 u8 lane sums - #3242

Problem

Full-width AVX2 uint8_t SumOfLanes and ReduceSum use the generic shuffle-and-widen reduction despite AVX2 already having a native SumsOf8 implementation.

Root cause

The generic reduction eligibility condition excludes the existing u8x8 and u8x16 specialisations, but not u8x32. There is therefore no overload that routes a 256-bit byte reduction through SumsOf8.

Change

Exclude u8x32 from the generic reduction and add a 256-bit overload that:

1. uses SumsOf8 to form four exact uint64 partial sums;
2. reduces those partial sums using the existing uint64 implementation; and
3. broadcasts the low byte.

The low byte preserves the existing modulo-256 uint8 reduction semantics.

Correctness

The existing parameterised reduction tests cover SumOfLanes, ReduceSum, full and partial vectors, and unsigned wraparound.

• GCC 14.2: 40/40 focused cases passed
• Clang 19.1 with warnings-as-errors: 40/40 focused cases passed
• Clang ASan+UBSan: 40/40 focused cases passed
• MSVC 19.41 core Release test: passed
• Full GCC suite: 2,360 executed tests passed, 18 expected skips, zero failures

Performance

Intel Core i9-13905H, WSL2 Debian, static AVX2, -O3 -march=haswell, pinned to logical CPU 4. Results are medians of 31 interleaved samples with 16,777,216 reductions per sample. Brackets show IQR.

The GCC SIMD reduction sequence decreases from 14 vector operations to 7.
Clang shows a comparable reduction.

Regressions

The u8x16 control code generation is unchanged with both GCC and Clang.
The isolated micro-object text size also decreases. No tested target regressed.

Scope

Performance was measured only on AVX2 x86-64. No AVX-512, Arm, RISC-V or Power performance is claimed.