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[AMDGPU][Attributor] Add ThinOrFullLTOPhase as an argument #123994

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Merged
merged 3 commits into from
May 2, 2025

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shiltian
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@llvmbot
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llvmbot commented Jan 22, 2025

@llvm/pr-subscribers-lto

@llvm/pr-subscribers-backend-amdgpu

Author: Shilei Tian (shiltian)

Changes

Full diff: https://github.com/llvm/llvm-project/pull/123994.diff

3 Files Affected:

  • (modified) llvm/lib/Target/AMDGPU/AMDGPU.h (+5-2)
  • (modified) llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp (+30-7)
  • (modified) llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (+6-3)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h
index 3d5a44a3623a00..f4921a68d7a1d6 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.h
@@ -333,9 +333,12 @@ class AMDGPUAttributorPass : public PassInfoMixin<AMDGPUAttributorPass> {
 
   AMDGPUAttributorOptions Options;
 
+  const ThinOrFullLTOPhase LTOPhase;
+
 public:
-  AMDGPUAttributorPass(TargetMachine &TM, AMDGPUAttributorOptions Options = {})
-      : TM(TM), Options(Options) {};
+  AMDGPUAttributorPass(TargetMachine &TM, AMDGPUAttributorOptions Options,
+                       ThinOrFullLTOPhase LTOPhase = ThinOrFullLTOPhase::None)
+      : TM(TM), Options(Options), LTOPhase(LTOPhase) {};
   PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
 };
 
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
index 546db318c17d53..2bc68cf2fd6a4a 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
@@ -1330,7 +1330,8 @@ static void addPreloadKernArgHint(Function &F, TargetMachine &TM) {
 }
 
 static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM,
-                    AMDGPUAttributorOptions Options) {
+                    AMDGPUAttributorOptions Options,
+                    ThinOrFullLTOPhase LTOPhase) {
   SetVector<Function *> Functions;
   for (Function &F : M) {
     if (!F.isIntrinsic())
@@ -1365,9 +1366,30 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM,
 
   Attributor A(Functions, InfoCache, AC);
 
-  LLVM_DEBUG(dbgs() << "[AMDGPUAttributor] Module " << M.getName() << " is "
-                    << (AC.IsClosedWorldModule ? "" : "not ")
-                    << "assumed to be a closed world.\n");
+  LLVM_DEBUG({
+    StringRef LTOPhaseStr;
+    switch (LTOPhase) {
+    case ThinOrFullLTOPhase::None:
+      LTOPhaseStr = "None";
+      break;
+    case ThinOrFullLTOPhase::ThinLTOPreLink:
+      LTOPhaseStr = "ThinLTOPreLink";
+      break;
+    case ThinOrFullLTOPhase::ThinLTOPostLink:
+      LTOPhaseStr = "ThinLTOPostLink";
+      break;
+    case ThinOrFullLTOPhase::FullLTOPreLink:
+      LTOPhaseStr = "FullLTOPreLink";
+      break;
+    case ThinOrFullLTOPhase::FullLTOPostLink:
+      LTOPhaseStr = "FullLTOPostLink";
+      break;
+    }
+    dbgs() << "[AMDGPUAttributor] Running at phase " << LTOPhaseStr << '\n';
+    dbgs() << "[AMDGPUAttributor] Module " << M.getName() << " is "
+           << (AC.IsClosedWorldModule ? "" : "not ")
+           << "assumed to be a closed world.\n";
+  });
 
   for (auto *F : Functions) {
     A.getOrCreateAAFor<AAAMDAttributes>(IRPosition::function(*F));
@@ -1420,7 +1442,8 @@ class AMDGPUAttributorLegacy : public ModulePass {
 
   bool runOnModule(Module &M) override {
     AnalysisGetter AG(this);
-    return runImpl(M, AG, *TM, /*Options=*/{});
+    return runImpl(M, AG, *TM, /*Options=*/{},
+                   /*LTOPhase=*/ThinOrFullLTOPhase::None);
   }
 
   void getAnalysisUsage(AnalysisUsage &AU) const override {
@@ -1441,8 +1464,8 @@ PreservedAnalyses llvm::AMDGPUAttributorPass::run(Module &M,
   AnalysisGetter AG(FAM);
 
   // TODO: Probably preserves CFG
-  return runImpl(M, AG, TM, Options) ? PreservedAnalyses::none()
-                                     : PreservedAnalyses::all();
+  return runImpl(M, AG, TM, Options, LTOPhase) ? PreservedAnalyses::none()
+                                               : PreservedAnalyses::all();
 }
 
 char AMDGPUAttributorLegacy::ID = 0;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index cb662258b26672..da4aa92c090fab 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -852,8 +852,10 @@ void AMDGPUTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
                                             OptimizationLevel Level,
                                             ThinOrFullLTOPhase Phase) {
     if (Level != OptimizationLevel::O0) {
-      if (!isLTOPreLink(Phase))
-        MPM.addPass(AMDGPUAttributorPass(*this));
+      if (!isLTOPreLink(Phase)) {
+        AMDGPUAttributorOptions Opts;
+        MPM.addPass(AMDGPUAttributorPass(*this, Opts, Phase));
+      }
     }
   });
 
@@ -876,7 +878,8 @@ void AMDGPUTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
             AMDGPUAttributorOptions Opt;
             if (HasClosedWorldAssumption)
               Opt.IsClosedWorld = true;
-            PM.addPass(AMDGPUAttributorPass(*this, Opt));
+            PM.addPass(AMDGPUAttributorPass(
+                *this, Opt, ThinOrFullLTOPhase::FullLTOPostLink));
           }
         }
       });

@shiltian
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shiltian commented Jan 22, 2025

I'll add a test and update the description if the PR depending on it is good; otherwise this change is useless.

@shiltian shiltian force-pushed the users/shiltian/pass-stage-to-amdgpuattributor branch from 34fd831 to 1c1acf3 Compare February 4, 2025 17:59
@shiltian shiltian force-pushed the users/shiltian/pass-stage-to-amdgpuattributor branch 3 times, most recently from 55196cc to 9b9a320 Compare February 10, 2025 16:20
@llvmbot llvmbot added the LTO Link time optimization (regular/full LTO or ThinLTO) label Feb 10, 2025
@shiltian shiltian force-pushed the users/shiltian/pass-stage-to-amdgpuattributor branch 2 times, most recently from 3118593 to c3685eb Compare March 24, 2025 02:37
@shiltian shiltian force-pushed the users/shiltian/pass-stage-to-amdgpuattributor branch 2 times, most recently from 0666b69 to 5cb643d Compare March 26, 2025 16:51
@shiltian shiltian force-pushed the users/shiltian/pass-stage-to-amdgpuattributor branch from 5cb643d to b7efaf3 Compare April 8, 2025 02:39
@shiltian shiltian force-pushed the users/shiltian/pass-stage-to-amdgpuattributor branch from b7efaf3 to aafd825 Compare April 8, 2025 03:17
@shiltian shiltian force-pushed the users/shiltian/pass-stage-to-amdgpuattributor branch from aafd825 to 35fda65 Compare May 1, 2025 18:14
@shiltian shiltian force-pushed the users/shiltian/pass-stage-to-amdgpuattributor branch from 35fda65 to ed136cc Compare May 1, 2025 22:33
@shiltian shiltian merged commit d6dbe77 into main May 2, 2025
11 checks passed
@shiltian shiltian deleted the users/shiltian/pass-stage-to-amdgpuattributor branch May 2, 2025 15:33
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