[SPIRV] Support extension SPV_INTEL_runtime_aligned #131072
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EbinJose2002
commented
Mar 13, 2025
- Added support for extension SPV_INTEL_runtime_aligned
- Added function parameter attribute RuntimeAlignedINTEL and capability RuntimeAlignedAttributeINTEL
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@llvm/pr-subscribers-backend-spir-v Author: None (EbinJose2002) Changes
Full diff: https://github.com/llvm/llvm-project/pull/131072.diff 7 Files Affected:
diff --git a/llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp b/llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
index 3039f975a4df2..ac2cfcc6d7db2 100644
--- a/llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
@@ -363,6 +363,13 @@ bool SPIRVCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
buildOpDecorate(VRegs[i][0], MIRBuilder,
SPIRV::Decoration::FuncParamAttr, {Attr});
}
+ if (isKernelArgRuntimeAligned(F, i) &&
+ ST->canUseExtension(SPIRV::Extension::SPV_INTEL_runtime_aligned)) {
+ auto Attr = static_cast<unsigned>(
+ SPIRV::FunctionParameterAttribute::RuntimeAlignedINTEL);
+ buildOpDecorate(VRegs[i][0], MIRBuilder,
+ SPIRV::Decoration::FuncParamAttr, {Attr});
+ }
if (F.getCallingConv() == CallingConv::SPIR_KERNEL) {
std::vector<SPIRV::Decoration::Decoration> ArgTypeQualDecs =
diff --git a/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp b/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
index 8d1714932c3c6..9e2ac08985c96 100644
--- a/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
@@ -90,7 +90,9 @@ static const std::map<std::string, SPIRV::Extension::Extension, std::less<>>
{"SPV_KHR_non_semantic_info",
SPIRV::Extension::Extension::SPV_KHR_non_semantic_info},
{"SPV_INTEL_long_composites",
- SPIRV::Extension::Extension::SPV_INTEL_long_composites}};
+ SPIRV::Extension::Extension::SPV_INTEL_long_composites},
+ {"SPV_INTEL_runtime_aligned",
+ SPIRV::Extension::Extension::SPV_INTEL_runtime_aligned}};
bool SPIRVExtensionsParser::parse(cl::Option &O, llvm::StringRef ArgName,
llvm::StringRef ArgValue,
diff --git a/llvm/lib/Target/SPIRV/SPIRVMetadata.cpp b/llvm/lib/Target/SPIRV/SPIRVMetadata.cpp
index 3800aac70df32..0ebf932619696 100644
--- a/llvm/lib/Target/SPIRV/SPIRVMetadata.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVMetadata.cpp
@@ -12,6 +12,7 @@
//===----------------------------------------------------------------------===//
#include "SPIRVMetadata.h"
+#include "llvm/IR/Constants.h"
using namespace llvm;
@@ -82,4 +83,13 @@ MDString *getOCLKernelArgTypeQual(const Function &F, unsigned ArgIdx) {
return getOCLKernelArgAttribute(F, ArgIdx, "kernel_arg_type_qual");
}
+bool isKernelArgRuntimeAligned(const Function &F, unsigned ArgIdx) {
+ if (MDNode *Node = F.getMetadata("kernel_arg_runtime_aligned")) {
+ if (auto *CMeta = dyn_cast<ConstantAsMetadata>(Node->getOperand(ArgIdx))) {
+ if (ConstantInt *Const = dyn_cast<ConstantInt>(CMeta->getValue()))
+ return Const->isOne();
+ }
+ }
+ return false;
+}
} // namespace llvm
diff --git a/llvm/lib/Target/SPIRV/SPIRVMetadata.h b/llvm/lib/Target/SPIRV/SPIRVMetadata.h
index fb4269457d6dd..ac36f5bd4860e 100644
--- a/llvm/lib/Target/SPIRV/SPIRVMetadata.h
+++ b/llvm/lib/Target/SPIRV/SPIRVMetadata.h
@@ -25,6 +25,7 @@ namespace llvm {
MDString *getOCLKernelArgAccessQual(const Function &F, unsigned ArgIdx);
MDString *getOCLKernelArgTypeQual(const Function &F, unsigned ArgIdx);
+bool isKernelArgRuntimeAligned(const Function &F, unsigned ArgIdx);
} // namespace llvm
#endif // LLVM_LIB_TARGET_SPIRV_METADATA_H
diff --git a/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp b/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
index e0b348f0bba10..ab949e82bd628 100644
--- a/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
@@ -888,6 +888,15 @@ static void addOpDecorateReqs(const MachineInstr &MI, unsigned DecIndex,
SPIRV::Extension::SPV_INTEL_global_variable_fpga_decorations);
} else if (Dec == SPIRV::Decoration::NonUniformEXT) {
Reqs.addRequirements(SPIRV::Capability::ShaderNonUniformEXT);
+ } else if (Dec == SPIRV::Decoration::FuncParamAttr) {
+ auto funcParamAttr = static_cast<
+ SPIRV::FunctionParameterAttribute::FunctionParameterAttribute>(
+ MI.getOperand(2).getImm());
+ if (funcParamAttr ==
+ SPIRV::FunctionParameterAttribute::RuntimeAlignedINTEL) {
+ Reqs.addRequirements(SPIRV::Capability::RuntimeAlignedAttributeINTEL);
+ Reqs.addExtension(SPIRV::Extension::SPV_INTEL_runtime_aligned);
+ }
}
}
diff --git a/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td b/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
index a871518e2094c..7778aecf27966 100644
--- a/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
+++ b/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
@@ -511,6 +511,7 @@ defm FunctionFloatControlINTEL : CapabilityOperand<5821, 0, 0, [SPV_INTEL_float_
defm LongCompositesINTEL : CapabilityOperand<6089, 0, 0, [SPV_INTEL_long_composites], []>;
defm BindlessImagesINTEL : CapabilityOperand<6528, 0, 0, [SPV_INTEL_bindless_images], []>;
defm MemoryAccessAliasingINTEL : CapabilityOperand<5910, 0, 0, [SPV_INTEL_memory_access_aliasing], []>;
+defm RuntimeAlignedAttributeINTEL : CapabilityOperand<5939, 0, 0, [SPV_INTEL_runtime_aligned], []>;
//===----------------------------------------------------------------------===//
// Multiclass used to define SourceLanguage enum values and at the same time
@@ -1161,6 +1162,7 @@ defm NoAlias : FunctionParameterAttributeOperand<4, [Kernel]>;
defm NoCapture : FunctionParameterAttributeOperand<5, [Kernel]>;
defm NoWrite : FunctionParameterAttributeOperand<6, [Kernel]>;
defm NoReadWrite : FunctionParameterAttributeOperand<7, [Kernel]>;
+defm RuntimeAlignedINTEL : FunctionParameterAttributeOperand<8, [RuntimeAlignedAttributeINTEL]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define Decoration enum values and at the same time
diff --git a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_runtime_aligned/RuntimeAligned.ll b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_runtime_aligned/RuntimeAligned.ll
new file mode 100644
index 0000000000000..eed106d49981c
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_runtime_aligned/RuntimeAligned.ll
@@ -0,0 +1,53 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_runtime_aligned %s -o - | FileCheck %s
+
+; CHECK: OpCapability RuntimeAlignedAttributeINTEL
+; CHECK: OpExtension "SPV_INTEL_runtime_aligned"
+; CHECK: OpName %[[#ARGA:]] "a"
+; CHECK: OpName %[[#ARGB:]] "b"
+; CHECK: OpName %[[#ARGC:]] "c"
+; CHECK: OpName %[[#ARGD:]] "d"
+; CHECK: OpName %[[#ARGE:]] "e"
+; CHECK: OpDecorate %[[#ARGA]] FuncParamAttr RuntimeAlignedINTEL
+; CHECK-NOT: OpDecorate %[[#ARGB]] FuncParamAttr RuntimeAlignedINTEL
+; CHECK: OpDecorate %[[#ARGC]] FuncParamAttr RuntimeAlignedINTEL
+; CHECK-NOT: OpDecorate %[[#ARGD]] FuncParamAttr RuntimeAlignedINTEL
+; CHECK-NOT: OpDecorate %[[#ARGE]] FuncParamAttr RuntimeAlignedINTEL
+
+; CHECK: OpFunction
+; CHECK: %[[#ARGA]] = OpFunctionParameter %[[#]]
+; CHECK: %[[#ARGB]] = OpFunctionParameter %[[#]]
+; CHECK: %[[#ARGC]] = OpFunctionParameter %[[#]]
+; CHECK: %[[#ARGD]] = OpFunctionParameter %[[#]]
+; CHECK: %[[#ARGE]] = OpFunctionParameter %[[#]]
+
+; ModuleID = 'runtime_aligned.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024"
+
+; Function Attrs: nounwind
+define spir_kernel void @test(ptr addrspace(1) %a, ptr addrspace(1) %b, ptr addrspace(1) %c, i32 %d, i32 %e) #0 !kernel_arg_addr_space !5 !kernel_arg_access_qual !6 !kernel_arg_type !7 !kernel_arg_type_qual !8 !kernel_arg_base_type !9 !kernel_arg_runtime_aligned !10 {
+entry:
+ ret void
+}
+
+attributes #0 = { nounwind }
+
+!spirv.MemoryModel = !{!0}
+!opencl.enable.FP_CONTRACT = !{}
+!spirv.Source = !{!1}
+!opencl.spir.version = !{!2}
+!opencl.ocl.version = !{!1}
+!opencl.used.extensions = !{!3}
+!opencl.used.optional.core.features = !{!3}
+!spirv.Generator = !{!4}
+
+!0 = !{i32 2, i32 2}
+!1 = !{i32 0, i32 0}
+!2 = !{i32 1, i32 2}
+!3 = !{}
+!4 = !{i16 6, i16 14}
+!5 = !{i32 1, i32 1, i32 1, i32 0, i32 0}
+!6 = !{!"none", !"none", !"none", !"none", !"none"}
+!7 = !{!"int*", !"float*", !"int*"}
+!8 = !{!"", !"", !"", !"", !""}
+!9 = !{!"int*", !"float*", !"int*", !"int", !"int"}
+!10 = !{i1 true, i1 false, i1 true, i1 false, i1 false}
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