diff --git a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
index 16364ab30f280..1f4f8ad4131ba 100644
--- a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
@@ -2490,6 +2490,15 @@ static bool generateEnqueueInst(const SPIRV::IncomingCall *Call,
     return buildNDRange(Call, MIRBuilder, GR);
   case SPIRV::OpEnqueueKernel:
     return buildEnqueueKernel(Call, MIRBuilder, GR);
+  case SPIRV::OpEnqueueMarker:
+    return MIRBuilder.buildInstr(Opcode)
+                      .addDef(Call->ReturnRegister)
+                      .addUse(GR->getSPIRVTypeID(Call->ReturnType))
+                      .addUse(Call->Arguments[0])
+                      .addUse(Call->Arguments[1])
+                      .addUse(Call->Arguments[2])
+                      .addUse(Call->Arguments[3]);
+
   default:
     return false;
   }
@@ -2792,7 +2801,6 @@ std::optional<bool> lowerBuiltin(const StringRef DemangledCall,
                                  const SmallVectorImpl<Register> &Args,
                                  SPIRVGlobalRegistry *GR) {
   LLVM_DEBUG(dbgs() << "Lowering builtin call: " << DemangledCall << "\n");
-
   // Lookup the builtin in the TableGen records.
   SPIRVType *SpvType = GR->getSPIRVTypeForVReg(OrigRet);
   assert(SpvType && "Inconsistent return register: expected valid type info");
diff --git a/llvm/lib/Target/SPIRV/SPIRVBuiltins.td b/llvm/lib/Target/SPIRV/SPIRVBuiltins.td
index b504e7b04d336..71b01a1a81472 100644
--- a/llvm/lib/Target/SPIRV/SPIRVBuiltins.td
+++ b/llvm/lib/Target/SPIRV/SPIRVBuiltins.td
@@ -670,6 +670,7 @@ defm : DemangledNativeBuiltin<"__spirv_GetDefaultQueue", OpenCL_std, Enqueue, 0,
 defm : DemangledNativeBuiltin<"ndrange_1D", OpenCL_std, Enqueue, 1, 3, OpBuildNDRange>;
 defm : DemangledNativeBuiltin<"ndrange_2D", OpenCL_std, Enqueue, 1, 3, OpBuildNDRange>;
 defm : DemangledNativeBuiltin<"ndrange_3D", OpenCL_std, Enqueue, 1, 3, OpBuildNDRange>;
+defm : DemangledNativeBuiltin<"enqueue_marker", OpenCL_std, Enqueue, 4, 4, OpEnqueueMarker>;
 
 // Spec constant builtin records:
 defm : DemangledNativeBuiltin<"__spirv_SpecConstant", OpenCL_std, SpecConstant, 2, 2, OpSpecConstant>;
@@ -1653,6 +1654,7 @@ def : OpenCLType<"opencl.event_t", "spirv.Event">;
 def : OpenCLType<"opencl.queue_t", "spirv.Queue">;
 def : OpenCLType<"opencl.sampler_t", "spirv.Sampler">;
 def : OpenCLType<"opencl.clk_event_t", "spirv.DeviceEvent">;
+def : OpenCLType<"opencl.clkevent_t", "spirv.DeviceEvent">;
 
 foreach aq = ["_t", "_ro_t", "_wo_t", "_rw_t"] in {
   defvar p = !cond(!not(!eq(!find(aq, "_rw_t"), -1)) : "2",
diff --git a/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td b/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
index 53064ebb51271..983784ef99932 100644
--- a/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
+++ b/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
@@ -755,6 +755,9 @@ def OpGetDefaultQueue: Op<303, (outs ID:$res), (ins TYPE:$type),
                   "$res = OpGetDefaultQueue $type">;
 def OpBuildNDRange: Op<304, (outs ID:$res), (ins TYPE:$type, ID:$GWS, ID:$LWS, ID:$GWO),
                   "$res = OpBuildNDRange $type $GWS $LWS $GWO">;
+def OpEnqueueMarker: Op<291, (outs ID:$res), (ins TYPE:$type, ID:$queue, ID:$num_events, ID:$event_wait_list, ID:$ret_event),
+                  "$res = OpEnqueueMarker $type $queue $num_events $event_wait_list $ret_event">;
+
 
 // TODO: 3.42.23. Pipe Instructions
 
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/enqueue_marker.ll b/llvm/test/CodeGen/SPIRV/transcoding/enqueue_marker.ll
new file mode 100644
index 0000000000000..e14992f0aa42e
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/transcoding/enqueue_marker.ll
@@ -0,0 +1,54 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s --check-prefixes=CHECK-SPIRV
+
+;CHECK-SPIRV: OpCapability DeviceEnqueue
+;CHECK-SPIRV: OpCapability GenericPointer
+;CHECK-SPIRV: %[[#queue:]] = OpTypeQueue
+;CHECK-SPIRV: %[[#DeviceEvent:]] = OpTypeDeviceEvent
+;CHECK-SPIRV: %[[#DefaultQueue:]] = OpGetDefaultQueue %[[#queue]]
+;CHECK-SPIRV: OpEnqueueMarker 
+
+
+target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-G1"
+target triple = "spir-unknown-unknown"
+
+; Function Attrs: convergent noinline norecurse nounwind optnone
+define dso_local spir_kernel void @test_enqueue_marker(ptr addrspace(1) noundef align 4 %out) #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !5 !kernel_arg_base_type !5 !kernel_arg_type_qual !6 {
+entry:
+  %out.addr = alloca ptr addrspace(1), align 4
+  %queue = alloca target("spirv.Queue"), align 4
+  %waitlist = alloca target("spirv.DeviceEvent"), align 4
+  %evt = alloca target("spirv.DeviceEvent"), align 4
+  store ptr addrspace(1) %out, ptr %out.addr, align 4
+  %call = call spir_func target("spirv.Queue") @_Z17get_default_queuev() #2
+  store target("spirv.Queue") %call, ptr %queue, align 4
+  %0 = load target("spirv.Queue"), ptr %queue, align 4
+  %waitlist.ascast = addrspacecast ptr %waitlist to ptr addrspace(4)
+  %evt.ascast = addrspacecast ptr %evt to ptr addrspace(4)
+  %call1 = call spir_func i32 @_Z14enqueue_marker9ocl_queuejPU3AS4K12ocl_clkeventPU3AS4S0_(target("spirv.Queue") %0, i32 noundef 1, ptr addrspace(4) noundef %waitlist.ascast, ptr addrspace(4) noundef %evt.ascast) #2
+  %1 = load ptr addrspace(1), ptr %out.addr, align 4
+  store i32 %call1, ptr addrspace(1) %1, align 4
+  ret void
+}
+
+; Function Attrs: convergent nounwind
+declare spir_func target("spirv.Queue") @_Z17get_default_queuev() #1
+
+; Function Attrs: convergent nounwind
+declare spir_func i32 @_Z14enqueue_marker9ocl_queuejPU3AS4K12ocl_clkeventPU3AS4S0_(target("spirv.Queue"), i32 noundef, ptr addrspace(4) noundef, ptr addrspace(4) noundef) #1
+
+attributes #0 = { convergent noinline norecurse nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "uniform-work-group-size"="false" }
+attributes #1 = { convergent nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
+attributes #2 = { convergent nounwind }
+
+!llvm.module.flags = !{!0}
+!opencl.ocl.version = !{!1}
+!opencl.spir.version = !{!1}
+!llvm.ident = !{!2}
+
+!0 = !{i32 1, !"wchar_size", i32 4}
+!1 = !{i32 2, i32 0}
+!2 = !{!"clang version 20.0.0git (https://github.com/sumesh-s-2002/llvm-project.git 87b457e23e06c337bf591d007907e4d049af37b4)"}
+!3 = !{i32 1}
+!4 = !{!"none"}
+!5 = !{!"int*"}
+!6 = !{!""}