[MC][TableGen] Expand ImplicitOffset field of MCInstrDesc #138127
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Increase width of ImplicitOffset to int from short to allow more table capacity. Reorder the elements to maintain natural alignment.
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@llvm/pr-subscribers-tablegen Author: Carl Ritson (perlfu) ChangesIncrease width of ImplicitOffset to Full diff: https://github.com/llvm/llvm-project/pull/138127.diff 2 Files Affected:
diff --git a/llvm/include/llvm/MC/MCInstrDesc.h b/llvm/include/llvm/MC/MCInstrDesc.h
index ef0b3c0a73992..5bb7f18bf2587 100644
--- a/llvm/include/llvm/MC/MCInstrDesc.h
+++ b/llvm/include/llvm/MC/MCInstrDesc.h
@@ -209,8 +209,8 @@ class MCInstrDesc {
unsigned short SchedClass; // enum identifying instr sched class
unsigned char NumImplicitUses; // Num of regs implicitly used
unsigned char NumImplicitDefs; // Num of regs implicitly defined
- unsigned short ImplicitOffset; // Offset to start of implicit op list
unsigned short OpInfoOffset; // Offset to info about operands
+ unsigned int ImplicitOffset; // Offset to start of implicit op list
uint64_t Flags; // Flags identifying machine instr class
uint64_t TSFlags; // Target Specific Flag values
diff --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp
index 377bfb593be5f..f240cab040caa 100644
--- a/llvm/utils/TableGen/InstrInfoEmitter.cpp
+++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp
@@ -1106,12 +1106,14 @@ void InstrInfoEmitter::emitRecord(
OS << Inst.ImplicitUses.size() << ",\t" << Inst.ImplicitDefs.size() << ",\t";
std::vector<const Record *> ImplicitOps = Inst.ImplicitUses;
llvm::append_range(ImplicitOps, Inst.ImplicitDefs);
- OS << Target.getName() << "ImpOpBase + " << EmittedLists[ImplicitOps]
- << ",\t";
// Emit the operand info offset.
OperandInfoTy OperandInfo = GetOperandInfo(Inst);
- OS << OperandInfoMap.find(OperandInfo)->second << ",\t0";
+ OS << OperandInfoMap.find(OperandInfo)->second << ",\t";
+
+ // Emit implicit operand base.
+ OS << Target.getName() << "ImpOpBase + " << EmittedLists[ImplicitOps]
+ << ",\t0";
// Emit all of the target independent flags...
if (Inst.isPreISelOpcode)
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arsenm
approved these changes
May 1, 2025
jayfoad
approved these changes
May 2, 2025
Unless the architecture is packing the structure (unlikely) then it should maintain the |
IanWood1
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May 6, 2025
Increase width of ImplicitOffset to `int` from `short` to allow more table capacity. Reorder the elements to maintain natural alignment.
IanWood1
pushed a commit
to IanWood1/llvm-project
that referenced
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May 6, 2025
Increase width of ImplicitOffset to `int` from `short` to allow more table capacity. Reorder the elements to maintain natural alignment.
IanWood1
pushed a commit
to IanWood1/llvm-project
that referenced
this pull request
May 6, 2025
Increase width of ImplicitOffset to `int` from `short` to allow more table capacity. Reorder the elements to maintain natural alignment.
GeorgeARM
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to GeorgeARM/llvm-project
that referenced
this pull request
May 7, 2025
Increase width of ImplicitOffset to `int` from `short` to allow more table capacity. Reorder the elements to maintain natural alignment.
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Increase width of ImplicitOffset to
intfromshortto allow more table capacity.Reorder the elements to maintain natural alignment.