[IntrinsicEmitter] Make AttributesMap PackedID type-adaptive #158383
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Pull Request Overview
This pull request makes the AttributesMap PackedID type-adaptive by allowing it to choose integer types ranging from int8 to int64 based on intrinsic inputs, following up on a previous change that made it bit-adaptive.
- Dynamically calculates the required bit size for the packed ID based on intrinsic attributes
- Introduces adaptive type selection with warnings for sizes exceeding 16 bits
- Updates code generation to use the calculated type size instead of hardcoded uint16_t
Reviewed Changes
Copilot reviewed 2 out of 2 changed files in this pull request and generated 3 comments.
| File | Description |
|---|---|
| llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp | Implements adaptive type sizing for AttributesMap with dynamic bit size calculation and type-safe code generation |
| llvm/test/TableGen/intrinsic-attrs.td | Updates test expectations to reflect the new uint8_t type for the generated IntrinsicsToAttributesMap |
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| uint8_t AttributesMapDataBitSize = | ||
| PowerOf2Ceil(UniqAttributesBitSize + UniqFnAttributesBitSize); | ||
| if (AttributesMapDataBitSize < 8) | ||
| AttributesMapDataBitSize = 8; | ||
| else if (AttributesMapDataBitSize > 64) | ||
| PrintFatalError( | ||
| "More than 16 bits are used for IntrinsicsToAttributesMap's entry!"); | ||
| "Packed ID of IntrinsicsToAttributesMap exceeds 64b!"); | ||
| else if (AttributesMapDataBitSize > 16) |
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The PowerOf2Ceil function returns the next power of 2, but this could result in a bit size that doesn't correspond to valid integer types. For example, if the sum is 6 bits, PowerOf2Ceil(6) returns 8, but if the sum is 12 bits, it returns 16. However, for values like 24 bits, it would return 32, but the code should map this to either 32 or 64-bit integers. The logic should explicitly map to valid integer sizes (8, 16, 32, 64).
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| uint16_t PackedID = IntrinsicsToAttributesMap[id - 1]; | ||
| uint16_t FnAttrID = PackedID >> ({}); | ||
| uint16_t ArgAttrID = PackedID & ({}); | ||
| uint{}_t PackedID = IntrinsicsToAttributesMap[id - 1]; |
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The format string uint{}_t is used without the bit size parameter. This should be uint{}_t with the AttributesMapDataBitSize parameter passed to formatv to properly substitute the bit size.
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| @@ -779,16 +786,17 @@ AttributeList Intrinsic::getAttributes(LLVMContext &C, ID id, | |||
| AttributeSet Intrinsic::getFnAttributes(LLVMContext &C, ID id) { | |||
| if (id == 0) | |||
| return AttributeSet(); | |||
| uint16_t PackedID = IntrinsicsToAttributesMap[id - 1]; | |||
| uint16_t FnAttrID = PackedID >> ({}); | |||
| uint{}_t PackedID = IntrinsicsToAttributesMap[id - 1]; | |||
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The format string uint{}_t is used without the bit size parameter. This should be uint{}_t with the AttributesMapDataBitSize parameter passed to formatv to properly substitute the bit size.
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|
✅ With the latest revision this PR passed the C/C++ code formatter. |
Following up llvm#157965 which made this bit-adaptive, this patch attempts to make this map able to choose type ranging from int8 to int64 based on intrinsic inputs.
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@llvm/pr-subscribers-tablegen Author: Elvin Wang (elvinw-intel) ChangesFollowing up #157965 which made this bit-adaptive, this patch attempts to make this map able to choose type ranging from int8 to int64 based on intrinsic inputs. Full diff: https://github.com/llvm/llvm-project/pull/158383.diff 2 Files Affected:
diff --git a/llvm/test/TableGen/intrinsic-attrs.td b/llvm/test/TableGen/intrinsic-attrs.td
index ab808445f40a2..bdf987bbf7579 100644
--- a/llvm/test/TableGen/intrinsic-attrs.td
+++ b/llvm/test/TableGen/intrinsic-attrs.td
@@ -24,7 +24,7 @@ def int_deref_ptr_ret : Intrinsic<[llvm_ptr_ty], [], [Dereferenceable<RetIndex,
// CHECK-NEXT: Attribute::get(C, Attribute::NoUnwind),
// CHECK-NEXT: });
-// CHECK: static constexpr uint16_t IntrinsicsToAttributesMap[] = {
+// CHECK: static constexpr uint8_t IntrinsicsToAttributesMap[] = {
// CHECK: 0 << 2 | 0, // llvm.deref.ptr.ret
// CHECK: 1 << 2 | 1, // llvm.random.gen
// CHECK: }; // IntrinsicsToAttributesMap
diff --git a/llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp b/llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
index a702838afe463..f3e6d5039690b 100644
--- a/llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
+++ b/llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
@@ -617,9 +617,7 @@ static AttributeSet getIntrinsicFnAttributeSet(LLVMContext &C, unsigned ID) {
}
OS << R"(
}
-} // getIntrinsicFnAttributeSet
-
-static constexpr uint16_t IntrinsicsToAttributesMap[] = {)";
+} // getIntrinsicFnAttributeSet)";
// Compute unique argument attributes.
std::map<const CodeGenIntrinsic *, unsigned, AttributeComparator>
@@ -633,17 +631,25 @@ static constexpr uint16_t IntrinsicsToAttributesMap[] = {)";
// Note, ID `-1` is used to indicate no function attributes.
const uint8_t UniqFnAttributesBitSize =
Log2_32_Ceil(UniqFnAttributes.size() + 2);
- const uint16_t NoFunctionAttrsID =
- maskTrailingOnes<uint16_t>(UniqFnAttributesBitSize);
- if (UniqAttributesBitSize + UniqFnAttributesBitSize > 16)
- PrintFatalError(
- "More than 16 bits are used for IntrinsicsToAttributesMap's entry!");
-
- // Assign a 16-bit packed ID for each intrinsic. The lower bits will be its
+ const uint32_t NoFunctionAttrsID =
+ maskTrailingOnes<uint32_t>(UniqFnAttributesBitSize);
+ uint8_t AttributesMapDataBitSize =
+ PowerOf2Ceil(UniqAttributesBitSize + UniqFnAttributesBitSize);
+ if (AttributesMapDataBitSize < 8)
+ AttributesMapDataBitSize = 8;
+ else if (AttributesMapDataBitSize > 64)
+ PrintFatalError("Packed ID of IntrinsicsToAttributesMap exceeds 64b!");
+ else if (AttributesMapDataBitSize > 16)
+ PrintWarning("Packed ID of IntrinsicsToAttributesMap exceeds 16b, "
+ "this may cause performance drop!");
+
+ // Assign a packed ID for each intrinsic. The lower bits will be its
// "argument attribute ID" (index in UniqAttributes) and upper bits will be
// its "function attribute ID" (index in UniqFnAttributes).
+ OS << formatv("\nstatic constexpr uint{}_t IntrinsicsToAttributesMap[] = {{",
+ AttributesMapDataBitSize);
for (const CodeGenIntrinsic &Int : Ints) {
- uint16_t FnAttrIndex =
+ uint32_t FnAttrIndex =
hasFnAttributes(Int) ? UniqFnAttributes[&Int] : NoFunctionAttrsID;
OS << formatv("\n {} << {} | {}, // {}", FnAttrIndex,
UniqAttributesBitSize, UniqAttributes[&Int], Int.Name);
@@ -751,9 +757,9 @@ AttributeList Intrinsic::getAttributes(LLVMContext &C, ID id,
if (id == 0)
return AttributeList();
- uint16_t PackedID = IntrinsicsToAttributesMap[id - 1];
- uint16_t FnAttrID = PackedID >> ({});
- uint16_t ArgAttrID = PackedID & ({});
+ uint{}_t PackedID = IntrinsicsToAttributesMap[id - 1];
+ uint32_t FnAttrID = PackedID >> ({});
+ uint32_t ArgAttrID = PackedID & ({});
using PairTy = std::pair<unsigned, AttributeSet>;
alignas(PairTy) char ASStorage[sizeof(PairTy) * {}];
PairTy *AS = reinterpret_cast<PairTy *>(ASStorage);
@@ -779,16 +785,17 @@ AttributeList Intrinsic::getAttributes(LLVMContext &C, ID id,
AttributeSet Intrinsic::getFnAttributes(LLVMContext &C, ID id) {
if (id == 0)
return AttributeSet();
- uint16_t PackedID = IntrinsicsToAttributesMap[id - 1];
- uint16_t FnAttrID = PackedID >> ({});
+ uint{}_t PackedID = IntrinsicsToAttributesMap[id - 1];
+ uint32_t FnAttrID = PackedID >> ({});
return getIntrinsicFnAttributeSet(C, FnAttrID);
}
#endif // GET_INTRINSIC_ATTRIBUTES
)",
- UniqAttributesBitSize,
+ AttributesMapDataBitSize, UniqAttributesBitSize,
maskTrailingOnes<uint16_t>(UniqAttributesBitSize), MaxNumAttrs,
- NoFunctionAttrsID, UniqAttributesBitSize);
+ NoFunctionAttrsID, AttributesMapDataBitSize,
+ UniqAttributesBitSize);
}
void IntrinsicEmitter::EmitIntrinsicToBuiltinMap(
|
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Following up #157965 which made this bit-adaptive, this patch attempts to make this map able to choose type ranging from int8 to int64 based on intrinsic inputs.