esp32/machine_timer: Restrict timer numbers for ESP32C6 to 0 and 1. #16439
Conversation
There was a problem hiding this comment.
Thanks for picking this up, @robert-hh. If you don't have time to apply and test these suggestions then let me know, I think it'd be fine to merge this fix now and then move over to SOC macros later.
|
Don't forget line 69 identical fix in addition to line 79
…On Tue, Dec 17, 2024 at 3:00 PM Angus Gratton ***@***.***> wrote:
***@***.**** commented on this pull request.
Thanks for picking this up, @robert-hh <https://github.com/robert-hh>. If
you don't have time to apply and test these suggestions then let me know, I
think it'd be fine to merge this fix now and then move over to SOC macros
later.
------------------------------
In ports/esp32/machine_timer.c
<#16439 (comment)>
:
> @@ -66,7 +66,7 @@ static void machine_timer_print(const mp_print_t *print, mp_obj_t self_in, mp_pr
machine_timer_obj_t *self = self_in;
qstr mode = self->repeat ? MP_QSTR_PERIODIC : MP_QSTR_ONE_SHOT;
uint64_t period = self->period / (TIMER_SCALE / 1000); // convert to ms
- #if CONFIG_IDF_TARGET_ESP32C3
+ #if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
⬇️ Suggested change
- #if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
+ #if SOC_TIMER_GROUP_TIMERS_PER_GROUP == 1
Is it possible to use this capability macro instead? Will future-proof us
for ESP32C2 (has open PR #15906
<#15906>) and other future
chips.
❯ rg "define SOC_TIMER_GROUP_TIMERS_PER_GROUP"
components/soc/esp32c3/include/soc/soc_caps.h
348:#define SOC_TIMER_GROUP_TIMERS_PER_GROUP (1U)
components/soc/esp32h2/include/soc/soc_caps.h
420:#define SOC_TIMER_GROUP_TIMERS_PER_GROUP (1U)
components/soc/esp32s2/include/soc/soc_caps.h
319:#define SOC_TIMER_GROUP_TIMERS_PER_GROUP (2)
components/soc/esp32c2/include/soc/soc_caps.h
263:#define SOC_TIMER_GROUP_TIMERS_PER_GROUP (1U)
components/soc/esp32/include/soc/soc_caps.h
314:#define SOC_TIMER_GROUP_TIMERS_PER_GROUP (2)
components/soc/esp32p4/include/soc/soc_caps.h
454:#define SOC_TIMER_GROUP_TIMERS_PER_GROUP 2
components/soc/esp32s3/include/soc/soc_caps.h
355:#define SOC_TIMER_GROUP_TIMERS_PER_GROUP (2)
components/soc/esp32c6/include/soc/soc_caps.h
425:#define SOC_TIMER_GROUP_TIMERS_PER_GROUP (1U)
------------------------------
In ports/esp32/machine_timer.c
<#16439 (comment)>
:
> @@ -108,7 +108,16 @@ static mp_obj_t machine_timer_make_new(const mp_obj_type_t *type, size_t n_args,
mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
// Create the new timer.
- machine_timer_obj_t *self = machine_timer_create(mp_obj_get_int(args[0]));
+ uint32_t timer_number = mp_obj_get_int(args[0]);
+ #if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
+ uint32_t timer_count = 2;
+ #else
+ uint32_t timer_count = 4;
+ #endif
+ if (timer_number >= timer_count) {
Similar to above, I think we can use SOC_TIMER_GROUP_TOTAL_TIMERS here.
❯ rg "define SOC_TIMER_GROUP_TOTAL_TIMERS"
components/soc/esp32/include/soc/soc_caps.h
316:#define SOC_TIMER_GROUP_TOTAL_TIMERS (4)
components/soc/esp32c2/include/soc/soc_caps.h
266:#define SOC_TIMER_GROUP_TOTAL_TIMERS (1U)
components/soc/esp32c3/include/soc/soc_caps.h
352:#define SOC_TIMER_GROUP_TOTAL_TIMERS (2)
components/soc/esp32h2/include/soc/soc_caps.h
424:#define SOC_TIMER_GROUP_TOTAL_TIMERS (2)
components/soc/esp32s3/include/soc/soc_caps.h
359:#define SOC_TIMER_GROUP_TOTAL_TIMERS (4)
components/soc/esp32s2/include/soc/soc_caps.h
323:#define SOC_TIMER_GROUP_TOTAL_TIMERS (4)
components/soc/esp32p4/include/soc/soc_caps.h
458:#define SOC_TIMER_GROUP_TOTAL_TIMERS 4
components/soc/esp32c6/include/soc/soc_caps.h
429:#define SOC_TIMER_GROUP_TOTAL_TIMERS (2)
—
Reply to this email directly, view it on GitHub
<#16439 (review)>,
or unsubscribe
<https://github.com/notifications/unsubscribe-auth/AIEPTRLLU2CHQYI7AGFMDBT2GCUKJAVCNFSM6AAAAABTZEBFPOVHI2DSMVQWIX3LMV43YUDVNRWFEZLROVSXG5CSMV3GSZLXHMZDKMJQGM2DMMJVGI>
.
You are receiving this because you were mentioned.Message ID:
***@***.***>
|
|
That was already mentioned in my comment. |
ba05ede to
123b6e0
Compare
|
Updated. Tested with ESP32, ESP32S3, ESP32C3, ESP32C6. |
123b6e0 to
49deb43
Compare
Codecov ReportAll modified and coverable lines are covered by tests ✅
Additional details and impacted files@@ Coverage Diff @@
## master #16439 +/- ##
=======================================
Coverage 98.57% 98.57%
=======================================
Files 164 164
Lines 21349 21349
=======================================
Hits 21045 21045
Misses 304 304 ☔ View full report in Codecov by Sentry. |
|
Code size report: |
|
@robert-hh you have a stray change to the |
49deb43 to
8759f69
Compare
|
I hope it's fixed now. It's now at pico-sdk v2.1.0. These stray changes seem always complicated for me to fix. |
The ESP32C6 has only one timer in each of the two groups. Also add a check for valid timer numbers. Addresses issue micropython#16438. Signed-off-by: robert-hh <[email protected]>
8759f69 to
1360584
Compare
|
Thanks for updating, it's all good now. |
|
@robert-hh @projectgus, I'm not so sure about this. I'm testing this now and the ESP32C3 loses access to two timers. |
I believe the issue is within esp-idf actually, opened an issue there. |
|
As far as I understand the manual, the ESP32C3 has two general purpose timers, one in each of the two timer groups. There is another timer in each timer group, but that is a watchdog timer. |
I agree with @robert-hh, I think the bug might be in that line of ESP-IDF documentation and not the ESP-IDF code. Here's the ESP32-C3 reference manual: |
|
(That quoted line is also no longer present in the latest version of the ESP-IDF docs, the linked docs are for the v4.3 release which came out in 2021.) |
|
Many thanks. My mistake, I was looking at old docs – confirmed by Espressif here: |
Summary
The ESP32C6 has only one timer in each of the two groups, like the ESP32C3.
Add also a check for valid timer numbers.
Addresses the issue #16438 raised by @mattklapman.
Testing
Tested with an ESP32C6 generic board and a ESP32 Generic board.