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extmod/modlwip,esp32,unix: Add support for socket recv flags argument #17312

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Merged
merged 6 commits into from
Jun 3, 2025

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projectgus
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@projectgus projectgus commented May 16, 2025

Summary

Goal of this PR is to have support for the MSG_DONTWAIT and MSG_PEEK flags for socket recv & recvfrom on unix, esp32, and all "bare metal" LWIP ports.

  • Bare metal LWIP adds support for these flags in modlwip.c, with some refactoring to try and reduce the code size impact.
  • esp32 port now passes these flags through to the LWIP BSD socket layer, which already supports them.
  • unix port already had support for flags argument. MSG_PEEK constant is now exposed to Python code.
  • Adds multi_net tests for the new flags.
  • Adds docs for the flags argument.

Note: Zephyr & CC3200 ports have their own socket module implementations, support not added to these yet. Zephyr looks like it would be trivially easy, CC3200 I didn't look into.

Testing

  • Ran new and existing multi_net tests on ESP32_GENERIC_S3, RPI_PICO2_W, RPI_PICO_W and PYBD_SF2 boards. One outstanding issue that seems lower level than these changes, see comment.

Trade-offs and Alternatives

  • Support for MSG_PEEK is motivated by wanting to improve the DTLS support. Adding MSG_DONTWAIT as well was relatively easy, and both of these flags are potentially useful for socket programming on MicroPython. However I guess the obvious alternative is not to add them, or to implement them via a Python wrapper in the Python socket module (which would be hacky but possible).

@projectgus projectgus added port-esp32 extmod Relates to extmod/ directory in source port-unix port-rp2 labels May 16, 2025
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Code size report:

   bare-arm:    +0 +0.000% 
minimal x86:    +0 +0.000% 
   unix x64:   +56 +0.007% standard[incl +32(data)]
      stm32:    +0 +0.000% PYBV10
     mimxrt:    +0 +0.000% TEENSY40
        rp2:   +32 +0.003% RPI_PICO_W
       samd:    +0 +0.000% ADAFRUIT_ITSYBITSY_M4_EXPRESS
  qemu rv32:    +0 +0.000% VIRT_RV32

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codecov bot commented May 16, 2025

Codecov Report

All modified and coverable lines are covered by tests ✅

Project coverage is 98.54%. Comparing base (4dff9cb) to head (ba92063).
Report is 6 commits behind head on master.

Additional details and impacted files
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##           master   #17312   +/-   ##
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  Coverage   98.54%   98.54%           
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  Files         169      169           
  Lines       21898    21898           
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  Hits        21579    21579           
  Misses        319      319           

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This looks good, thanks!

I tested on ESP8266, RPI_PICO2_W-RISCV and ESP32_GENERIC, and all the new tests pass.

@projectgus projectgus force-pushed the feature/socket_recv_peek branch from 2308215 to 3c2eaf3 Compare May 30, 2025 02:15
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projectgus commented May 30, 2025

Have updated the tests and run on various ports (updated in description), but have found what looks like a lower level issue on RPI_PICO_W and RPI_PICO2_W.

The new udp_recv_dontwait.py test fails when instance0 is one of these rp2 boards. The UDP recv succeeds, then UDP sendto() appears to succeed and the frame appears to be passed into the CYW43 module ("ETHTX" is shown in the trace), but packet capture shows it is almost never sent (maybe <10% of the time it sends). Unclear why, other tests show occasional packet loss but nothing consistent like this.

@projectgus projectgus force-pushed the feature/socket_recv_peek branch from 3c2eaf3 to 14f7f61 Compare May 30, 2025 02:28
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projectgus commented May 30, 2025

The UDP recv succeeds, then UDP sendto() appears to succeed and the frame appears to be passed into the CYW43 module ("ETHTX" is shown in the trace), but packet capture shows it is almost never sent

One interesting thing in the output with wlan.config(trace=0xFF) is that the runs which succeed are always:

  1. ETHRX (first UDP packet from instance1)
  2. ETHTX (UDP packet sent)
  3. ETHRX (second UDP packet from instance1)

But the runs which fail always seem to be:

  1. ETHRX (first UDP packet from instance1)
  2. ETHRX (second UDP packet from instance1)
  3. ETHTX (UDP packet "sent" but not seen in the packet capture)

Weirdly this ordering seems to be happening internal to the CYW43 module, packet captures of successful runs on the Wi-Fi AP always show the second ordering over the air (RX, RX, TX) even though the trace log shows (RX, TX, RX).

@projectgus projectgus force-pushed the feature/socket_recv_peek branch 3 times, most recently from 355ef35 to 7f76f49 Compare May 30, 2025 05:38
@projectgus projectgus requested a review from dpgeorge May 30, 2025 06:11
Implements MSG_PEEK and MSG_DONTWAIT.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <[email protected]>
Implements MSG_PEEK and MSG_DONTWAIT (both passed through to LWIP
sockets API).

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <[email protected]>
This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <[email protected]>
Adds TCP and UDP multi_net test cases.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <[email protected]>
Adding multi_net case for UDP only, as TCP timing is hard to test reliably.

Signed-off-by: Angus Gratton <[email protected]>
Implementation added for various ports in the parent commits.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <[email protected]>
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I've re-reviewed this, it looks good.

I also tested on PYBD_SF2, RPI_PICO_W and ESP32_GENERIC. The new tests all pass, and so do existing ones (with known failures).

@dpgeorge dpgeorge force-pushed the feature/socket_recv_peek branch from 7f76f49 to ba92063 Compare June 3, 2025 02:56
@dpgeorge dpgeorge merged commit ba92063 into micropython:master Jun 3, 2025
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@projectgus projectgus deleted the feature/socket_recv_peek branch June 5, 2025 01:47
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