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[GSoC] Add more universal intrinsic implementations for RVV. #22353
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Update:
And we may also need to update the documentations: |
Hello @vpisarev, I have added some implementations as discussed in our meeting today (zip, transpose and interleave), there are also 2 sets of functions submitted together (combine and reverse). And this PR is frozen for review, any new implementations will commit to another new PR. |
looks good to me. @asmorkalov, since it's very unobtrusive patch, I suggest to merge it |
👍 Tested manually with Qemu! |
This is a patch of my GSoC project that the goal is to make the existing Universal Intrinsic compatible with scalable (variable-length) backends.
In #22179, we have already introduce a new framework of universal intrinsic for RISC-V Vector backend and few implementations and test cases are also added.
In this patch, we are going to add more universal intrinsic implementations for RVV.
Tested with QEMU for RVV backend in various VLEN:
Also tested for AVX and SSE backend on Linux.
Pull Request Readiness Checklist
See details at https://github.com/opencv/opencv/wiki/How_to_contribute#making-a-good-pull-request
Patch to opencv_extra has the same branch name.