Summary

Add the core dynarec infrastructure for PPC64LE with 3 MOV opcodes as proof the pipeline works end-to-end. Follows the incremental approach of the RV64 dynarec initial commit (5a9b896).

Depends on #3591 (platform support PR) — please merge that first.

Changes (36 files, ~9200 lines)

Core Infrastructure

• Emitter (ppc64le_emitter.h): Instruction encoding macros for PPC64LE ISA. Argument order follows Power ISA assembly convention (Rt, offset, Ra) — documented in header comment.
• Helper (dynarec_ppc64le_helper.h/c): STEPNAME-aliased macros and core functions (geted, move32/move64, jump_to_epilog/jump_to_next, call_c/call_n, grab_segdata, emit_pf). Displacement modes use named constants (DISP_NONE/DISP_D/DISP_DQ) and magic numbers replaced with PPC64_DISP_MAX.
• Register mapping (ppc64le_mapping.h): x86-64 to PPC64LE register mapping, ELFv2 ABI-compliant.
• Functions (dynarec_ppc64le_functions.c/h): fpu_reset, inst_name_pass3, updateNativeFlags, get_free_scratch, ppc64le_fast_hash, plus FPU register management stubs.
• Architecture (dynarec_ppc64le_arch.c): CancelBlock, FillBlock, AddMarkRecursive, native address resolution, jump table support.
• Constants (dynarec_ppc64le_consts.c/h): Constants table management (unused arrays removed per review).

Assembly

• ppc64le_prolog.S / ppc64le_epilog.S: Dynarec entry/exit.
• ppc64le_next.S: Block-to-block dispatcher.
• ppc64le_lock.S/h: Atomic operations (LL/SC pairs, mutex-based 128-bit CAS).

Opcodes (3 MOV instructions in _00.c)

• 0x89 — MOV Ed,Gd
• 0x8B — MOV Gd,Ed
• 0x8D — LEA Gd,Ed

Stubs

• Printer returns "???" for all instructions (will be expanded later).
• _66.c, _f0.c, _66f0.c contain only DEFAULT fallback.
• FPU/SSE/AVX cache functions are empty stubs, following RV64 initial commit pattern.

Shared Dynarec Modifications

• CMakeLists.txt, dynarec_native_pass.c, dynarec_arch.h, dynarec_helper.h, dynarec_next.h, native_lock.h, dynacache_reloc.h, dynarec.c: PPC64LE #elif branches.

Review Changes

• Removed dynarec_ppc64le_arch.h and WIN32 guard (ptitSeb)
• Removed unused constant arrays from dynarec_ppc64le_consts.c (ptitSeb)
• Renamed DQ_ALIGN to DISP_NONE/DISP_D/DISP_DQ named constants (ptitSeb)
• Replaced magic number 32768 with PPC64_DISP_MAX constant (ptitSeb)
• Added emitter argument order convention comment (ptitSeb/classilla)
• Removed unused GOCOND macro (~80 lines) (ptitSeb)
• Fixed x87_get_st_empty macro bug, removed duplicate dynarec64_F0 (self-audit)
• Removed BEQZ_safe alias no longer needed after GOCOND removal

Notes on Reviewer Feedback

Re: unused macros in helper.h (ksco): Most macros in dynarec_ppc64le_helper.h are required by the shared dynarec_native_pass.c or are building blocks used by other macros. The genuinely unused items (GOCOND, duplicate dynarec64_F0) have been removed.

Re: unused functions in functions.c (ksco): All 19 public functions are called from shared dynarec infrastructure (dynarec_native.c, dynarec_native_pass.c, dynarec_native_functions.c, dynarec.c). None can be removed without breaking compilation.

Re: ALSL/BSTRPICK_D/BSTRINS_D names (ksco): These LoongArch names do not exist in the PPC64LE code. The PPC equivalents are already named SLADDy, BF_EXTRACT, and BF_INSERT.

Re: AVX 256-bit (ksco): PPC64LE has 128-bit VSX only. The AVX macros are shared infrastructure stubs required by dynarec_native_pass.c — they don't imply 256-bit support.

Related

• Original PR: PPC64LE dynarec: infrastructure and scaffolding (no opcodes yet) #3563
• Platform support: [PPC64LE] Add PPC64LE platform support (interpreter-only) #3591 (must be merged first)
• RV64 reference: initial commit 5a9b896