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YJIT: A64: Use ADDS/SUBS/CMP (immediate) when possible #10402

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Merged
merged 3 commits into from
Apr 2, 2024
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YJIT: A64: Use ADDS/SUBS/CMP (immediate) when possible #10402

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11e2f63
YJIT: A64: Use ADDS/SUBS/CMP (immediate) when possible
XrXr Mar 28, 2024
f96e057
YJIT: A64: Split asm.mul() with immediates properly
XrXr Mar 28, 2024
b7523ea
Merge branch 'master' into yjit-a64-add-one
maximecb Apr 2, 2024
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3 changes: 3 additions & 0 deletions yjit/src/asm/arm64/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -276,6 +276,9 @@ pub fn cmp(cb: &mut CodeBlock, rn: A64Opnd, rm: A64Opnd) {

DataReg::cmp(rn.reg_no, rm.reg_no, rn.num_bits).into()
},
(A64Opnd::Reg(rn), A64Opnd::Imm(imm12)) => {
DataImm::cmp(rn.reg_no, (imm12 as u64).try_into().unwrap(), rn.num_bits).into()
},
(A64Opnd::Reg(rn), A64Opnd::UImm(imm12)) => {
DataImm::cmp(rn.reg_no, imm12.try_into().unwrap(), rn.num_bits).into()
},
Expand Down
39 changes: 37 additions & 2 deletions yjit/src/backend/arm64/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -315,7 +315,11 @@ impl Assembler
match opnd {
Opnd::Reg(_) | Opnd::CArg(_) | Opnd::InsnOut { .. } => opnd,
Opnd::Mem(_) => split_load_operand(asm, opnd),
Opnd::Imm(_) => asm.load(opnd),
Opnd::Imm(imm) => if ShiftedImmediate::try_from(imm as u64).is_ok() {
opnd
} else {
asm.load(opnd)
}
Opnd::UImm(uimm) => {
if ShiftedImmediate::try_from(uimm).is_ok() {
opnd
Expand Down Expand Up @@ -655,7 +659,7 @@ impl Assembler
},
Insn::Mul { left, right, .. } => {
let opnd0 = split_load_operand(asm, *left);
let opnd1 = split_shifted_immediate(asm, *right);
let opnd1 = split_load_operand(asm, *right);
asm.mul(opnd0, opnd1);
},
Insn::Test { left, right } => {
Expand Down Expand Up @@ -1704,4 +1708,35 @@ mod tests {
0x8: csel x1, x11, x12, lt
"});
}

#[test]
fn test_add_with_immediate() {
let (mut asm, mut cb) = setup_asm();

let out = asm.add(Opnd::Reg(TEMP_REGS[1]), 1.into());
let out = asm.add(out, 1_usize.into());
asm.mov(Opnd::Reg(TEMP_REGS[0]), out);
asm.compile_with_num_regs(&mut cb, 2);

assert_disasm!(cb, "2b0500b16b0500b1e1030baa", {"
0x0: adds x11, x9, #1
0x4: adds x11, x11, #1
0x8: mov x1, x11
"});
}

#[test]
fn test_mul_with_immediate() {
let (mut asm, mut cb) = setup_asm();

let out = asm.mul(Opnd::Reg(TEMP_REGS[1]), 3.into());
asm.mov(Opnd::Reg(TEMP_REGS[0]), out);
asm.compile_with_num_regs(&mut cb, 2);

assert_disasm!(cb, "6b0080d22b7d0b9be1030baa", {"
0x0: mov x11, #3
0x4: mul x11, x9, x11
0x8: mov x1, x11
"});
}
}