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The stores and loads of inline call caches and the GCCCT need to be atomic, as they are written and read concurrently by different Ractors.
Previously we were relying on just doing pointer-sized loads, which will be essentially sufficient on x86's memory model, but on other architectures (arm, powerpc) the writes to the CC could be reordered (the writes to klass,
cme_
,call_
, etc could return previous or uninitialized values).To solve this we should use atomics with release/acquire semantics when writing the CC object to the cache. This will emit identical bytecode on x86, but will be different on ex. ARM (
ldar
instead ofldr
https://godbolt.org/z/deheaxMsx).This also changes updates to
cc->call_
to atomics. For these I used "relaxed" ordering since the value is a function pointer, which should not need "publishing".