Thanks to visit codestin.com
Credit goes to github.com

Skip to content

Conversation

jhawthorn
Copy link
Member

The stores and loads of inline call caches and the GCCCT need to be atomic, as they are written and read concurrently by different Ractors.

Previously we were relying on just doing pointer-sized loads, which will be essentially sufficient on x86's memory model, but on other architectures (arm, powerpc) the writes to the CC could be reordered (the writes to klass, cme_, call_, etc could return previous or uninitialized values).

To solve this we should use atomics with release/acquire semantics when writing the CC object to the cache. This will emit identical bytecode on x86, but will be different on ex. ARM (ldar instead of ldr https://godbolt.org/z/deheaxMsx).

This also changes updates to cc->call_ to atomics. For these I used "relaxed" ordering since the value is a function pointer, which should not need "publishing".

The same CME may be reused in multiple caches, so once the CACHED flag
is set, other Ractors may be checking for it being invalidated and we
should avoid writing to the field again.
Copy link

Tests Failed

✖️no tests failed ✔️62204 tests passed(1 flake)

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

1 participant