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0ce0251
uses_power_alignment: wording tweaks
RalfJung Mar 28, 2025
87ff60c
check_struct_for_power_alignment: simplify code
RalfJung Apr 1, 2025
55a419f
Remove backticks from `ShouldPanic::YesWithMessage`'s `TrFailedMsg`
ShE3py Apr 28, 2025
5b1e495
Add a few extra tests to `tests/ui/macros/stringify.rs`.
nnethercote Apr 23, 2025
99f6b63
Improve pretty-printing of braces.
nnethercote May 17, 2024
cf12e29
enable msa feature for mips in codegen tests
koalatux Apr 29, 2025
4fe94ba
add `rust.debug-assertions-tools` option
pietroalbini Apr 29, 2025
2393e44
miri: algebraic intrinsics: bring back float non-determinism
RalfJung Apr 29, 2025
478b378
Move `on impl position` test to proper directory
mejrs Apr 29, 2025
fc2cd77
Fix comment describing what the test does
mejrs Apr 29, 2025
923ca85
Add test
oli-obk Apr 29, 2025
a1c7059
Treat `ManuallyDrop` as `~const Destruct`
oli-obk Apr 29, 2025
a4ce307
Coalesce duplicate missing clone tests
mejrs Apr 29, 2025
64bcf3b
Rename `rustc_query_append!` to `rustc_with_all_queries!`
Zalathar Apr 29, 2025
ed2f4b6
Reformat parameters to macros used by with-all-queries
Zalathar Apr 29, 2025
851decd
mention provenance in the pointer::wrapping_offset docs
lolbinarycat Mar 31, 2025
7275462
canonical no type foldable :<
lcnr Apr 28, 2025
bd3e447
Rollup merge of #136160 - ShE3py:should-panic-backticks, r=thomcc
matthiaskrgr Apr 30, 2025
e897144
Rollup merge of #139059 - RalfJung:uses_power_alignment, r=nagisa
matthiaskrgr Apr 30, 2025
aeec053
Rollup merge of #139192 - lolbinarycat:docs-wrapping_offset-provenanc…
matthiaskrgr Apr 30, 2025
56e01fe
Rollup merge of #140312 - nnethercote:DelimArgs-spacing, r=petrochenkov
matthiaskrgr Apr 30, 2025
b1a1c67
Rollup merge of #140404 - lcnr:canonical-no-type-foldable, r=compiler…
matthiaskrgr Apr 30, 2025
bb03780
Rollup merge of #140437 - husqvarnagroup:af/codegen-test-mips-msa, r=…
matthiaskrgr Apr 30, 2025
1267f0c
Rollup merge of #140438 - ferrocene:pa-debug-assertions-tools, r=Kobzol
matthiaskrgr Apr 30, 2025
254f050
Rollup merge of #140439 - RalfJung:miri-algebraic-float-nondet, r=oli…
matthiaskrgr Apr 30, 2025
9625096
Rollup merge of #140445 - oli-obk:const-manually-drop, r=fee1-dead
matthiaskrgr Apr 30, 2025
89ad574
Rollup merge of #140446 - mejrs:test1, r=jieyouxu
matthiaskrgr Apr 30, 2025
ae7d78a
Rollup merge of #140448 - Zalathar:query-append, r=compiler-errors
matthiaskrgr Apr 30, 2025
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2 changes: 2 additions & 0 deletions tests/codegen/const-vector.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,7 @@
#![feature(rustc_attrs)]
#![feature(simd_ffi)]
#![feature(arm_target_feature)]
#![feature(mips_target_feature)]
#![allow(non_camel_case_types)]

// Setting up structs that can be used as const vectors
Expand Down Expand Up @@ -45,6 +46,7 @@ extern "unadjusted" {
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
pub fn do_call() {
unsafe {
// CHECK: call void @test_i8x2(<2 x i8> <i8 32, i8 64>
Expand Down
3 changes: 2 additions & 1 deletion tests/codegen/repr/transparent.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@
// For LoongArch: see codegen/loongarch-abi

#![crate_type = "lib"]
#![feature(repr_simd, transparent_unions, arm_target_feature)]
#![feature(repr_simd, transparent_unions, arm_target_feature, mips_target_feature)]

use std::marker::PhantomData;

Expand Down Expand Up @@ -142,6 +142,7 @@ pub struct Vector(f32x4);
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
pub extern "C" fn test_Vector(_: Vector) -> Vector {
loop {}
}
Expand Down
10 changes: 9 additions & 1 deletion tests/codegen/simd/extract-insert-dyn.rs
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//@compile-flags: -C opt-level=3 -C no-prepopulate-passes

#![feature(core_intrinsics, repr_simd, arm_target_feature)]
#![feature(core_intrinsics, repr_simd, arm_target_feature, mips_target_feature)]
#![no_std]
#![crate_type = "lib"]
#![allow(non_camel_case_types)]
Expand All @@ -24,6 +24,7 @@ pub struct i8x16([i8; 16]);
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
unsafe extern "C" fn dyn_simd_extract(x: i8x16, idx: u32) -> i8 {
simd_extract_dyn(x, idx)
}
Expand All @@ -34,6 +35,7 @@ unsafe extern "C" fn dyn_simd_extract(x: i8x16, idx: u32) -> i8 {
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
unsafe extern "C" fn literal_dyn_simd_extract(x: i8x16) -> i8 {
simd_extract_dyn(x, 7)
}
Expand All @@ -44,6 +46,7 @@ unsafe extern "C" fn literal_dyn_simd_extract(x: i8x16) -> i8 {
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
unsafe extern "C" fn const_dyn_simd_extract(x: i8x16) -> i8 {
simd_extract_dyn(x, const { 3 + 4 })
}
Expand All @@ -54,6 +57,7 @@ unsafe extern "C" fn const_dyn_simd_extract(x: i8x16) -> i8 {
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
unsafe extern "C" fn const_simd_extract(x: i8x16) -> i8 {
simd_extract(x, const { 3 + 4 })
}
Expand All @@ -64,6 +68,7 @@ unsafe extern "C" fn const_simd_extract(x: i8x16) -> i8 {
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
unsafe extern "C" fn dyn_simd_insert(x: i8x16, e: i8, idx: u32) -> i8x16 {
simd_insert_dyn(x, idx, e)
}
Expand All @@ -74,6 +79,7 @@ unsafe extern "C" fn dyn_simd_insert(x: i8x16, e: i8, idx: u32) -> i8x16 {
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
unsafe extern "C" fn literal_dyn_simd_insert(x: i8x16, e: i8) -> i8x16 {
simd_insert_dyn(x, 7, e)
}
Expand All @@ -84,6 +90,7 @@ unsafe extern "C" fn literal_dyn_simd_insert(x: i8x16, e: i8) -> i8x16 {
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
unsafe extern "C" fn const_dyn_simd_insert(x: i8x16, e: i8) -> i8x16 {
simd_insert_dyn(x, const { 3 + 4 }, e)
}
Expand All @@ -94,6 +101,7 @@ unsafe extern "C" fn const_dyn_simd_insert(x: i8x16, e: i8) -> i8x16 {
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
unsafe extern "C" fn const_simd_insert(x: i8x16, e: i8) -> i8x16 {
simd_insert(x, const { 3 + 4 }, e)
}