Pong game on FPGA Max 10 DE10-Lite, written in VHDL.
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Updated
Oct 14, 2021 - VHDL
Pong game on FPGA Max 10 DE10-Lite, written in VHDL.
The Design and Implementation of an Autonomous Mars Rover that has full mapping, remote control and power management capabilities.
ieee_proposed with names changed to floatfixlib to be compatible with Quartus Prime Lite and support fixed, float, etc.
Simulation platform that enables VHDL-style C++ coding. VCD generation for easy debug. VHDL code generation using C preprocessor. Simple risc-V rv32i SoC example, + Risc-V test suite and gcc bare-metal example. Linux (or WSL) / clang or gcc / risc-v toolchain / quartus required
This repository showcases the projects I developed for the DE10-Lite board as part of the "FPGA Capstone: Building FPGA Projects" course on Coursera.
Welcome to the BitBlaster_10bit_Processor! Our custom-designed 10-bit processor, crafted meticulously as part of a project for a Digital Logic Design course at South Dakota State University.
This is a template for projects using the Quartus Prime suite with the DE10-Lite FPGA board.
A recreation of the popular game Tic-Tac-Toe for the DE10-Lite FPGA dev board, in VHDL.
Train ticket vending machine application designed for execution on an FPGA system. The application allows users to purchase tickets for various destinations and includes maintenance functionalities.
This repository showcases a Verilog-based Snake and Apple Game, developed for the ECL 106: Digital System Design with HDL course. Running on an Altera DE10-Lite FPGA board and displayed on a VGA monitor, players control a snake to collect apples while avoiding obstacles. The snake grows longer with each apple, making the game progressively harder.
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