VU13P FPGA ADDA 调试与验证框架:UART/SPI boot、ADC IQ DSP、DAC 2× DDR、PySide6(SI5340 / AD9640 / AD9117)
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Updated
Jun 26, 2026 - Verilog
VU13P FPGA ADDA 调试与验证框架:UART/SPI boot、ADC IQ DSP、DAC 2× DDR、PySide6(SI5340 / AD9640 / AD9117)
S2C VP1902 FPGA MIPI CSI-2 验证框架(纯 RTL):Versal PDI + PPro-RT8 + PySide6,2-Lane RAW10(IMX298)
VU13P FPGA MIPI CSI-2 验证框架(MicroBlaze):Vivado BD + Vitis 固件 + PySide6,2-Lane RAW10(IMX298)
VU13P FPGA MIPI CSI-2 验证框架(纯 RTL):Vivado BD + mipi_sys_ctrl + PySide6,2-Lane RAW10(IMX298)
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