SparcDisassembler.cpp File Reference

#include "MCTargetDesc/SparcMCTargetDesc.h"
#include "TargetInfo/SparcTargetInfo.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDecoder.h"
#include "llvm/MC/MCDecoderOps.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Endian.h"
#include "SparcGenDisassemblerTables.inc"

Go to the source code of this file.

Macros
#define	DEBUG_TYPE   "sparc-disassembler"

Functions
static MCDisassembler *	createSparcDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)
LLVM_ABI LLVM_EXTERNAL_VISIBILITY void	LLVMInitializeSparcDisassembler ()
static DecodeStatus	DecodeIntRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodeI64RegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodeFPRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodeDFPRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodeQFPRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodeCoprocRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodeFCCRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodeASRRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodePRRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodeIntPairRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodeCoprocPairRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)
static bool	tryAddingSymbolicOperand (int64_t Value, bool isBranch, uint64_t Address, uint64_t Offset, uint64_t Width, MCInst &MI, const MCDisassembler *Decoder)
static DecodeStatus	DecodeCall (MCInst &MI, unsigned insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodeSIMM5 (MCInst &MI, unsigned insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodeSIMM13 (MCInst &MI, unsigned insn, uint64_t Address, const MCDisassembler *Decoder)
template<unsigned N>
static DecodeStatus	DecodeDisp (MCInst &MI, uint32_t ImmVal, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	readInstruction32 (ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t &Size, uint32_t &Insn, bool IsLittleEndian)
	Read four bytes from the ArrayRef and return 32 bit word.

Variables
static constexpr unsigned	IntRegDecoderTable []
static constexpr unsigned	FPRegDecoderTable []
static constexpr unsigned	DFPRegDecoderTable []
static constexpr unsigned	QFPRegDecoderTable []
static constexpr unsigned	FCCRegDecoderTable []
static constexpr unsigned	ASRRegDecoderTable []
static constexpr unsigned	PRRegDecoderTable []
static constexpr uint16_t	IntPairDecoderTable []
static constexpr unsigned	CPRegDecoderTable []
static constexpr uint16_t	CPPairDecoderTable []

Macro Definition Documentation

DEBUG_TYPE

#define DEBUG_TYPE   "sparc-disassembler"

Definition at line 28 of file SparcDisassembler.cpp.

Function Documentation

createSparcDisassembler()

MCDisassembler * createSparcDisassembler ( const Target & T, const MCSubtargetInfo & STI, MCContext & Ctx )

static

Definition at line 47 of file SparcDisassembler.cpp.

References T.

Referenced by LLVMInitializeSparcDisassembler().

DecodeASRRegsRegisterClass()

DecodeStatus DecodeASRRegsRegisterClass ( MCInst & Inst, unsigned RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 214 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), ASRRegDecoderTable, llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.

DecodeCall()

DecodeStatus DecodeCall ( MCInst & MI, unsigned insn, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 269 of file SparcDisassembler.cpp.

References llvm::MCOperand::createImm(), llvm::MCD::fieldFromInstruction(), MI, llvm::SignExtend64(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().

DecodeCoprocPairRegisterClass()

DecodeStatus DecodeCoprocPairRegisterClass ( MCInst & Inst, unsigned RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 250 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), CPPairDecoderTable, llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.

DecodeCoprocRegsRegisterClass()

DecodeStatus DecodeCoprocRegsRegisterClass ( MCInst & Inst, unsigned RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 196 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), CPRegDecoderTable, llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Reg, and llvm::MCDisassembler::Success.

DecodeDFPRegsRegisterClass()

DecodeStatus DecodeDFPRegsRegisterClass ( MCInst & Inst, unsigned RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 172 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), DFPRegDecoderTable, llvm::MCDisassembler::Fail, Reg, and llvm::MCDisassembler::Success.

DecodeDisp()

template<unsigned N>

DecodeStatus DecodeDisp ( MCInst & MI, uint32_t ImmVal, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 293 of file SparcDisassembler.cpp.

References llvm::MCOperand::createImm(), MI, N, llvm::SignExtend64(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().

DecodeFCCRegsRegisterClass()

DecodeStatus DecodeFCCRegsRegisterClass ( MCInst & Inst, unsigned RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 205 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, FCCRegDecoderTable, and llvm::MCDisassembler::Success.

DecodeFPRegsRegisterClass()

DecodeStatus DecodeFPRegsRegisterClass ( MCInst & Inst, unsigned RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 162 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, FPRegDecoderTable, Reg, and llvm::MCDisassembler::Success.

DecodeI64RegsRegisterClass()

DecodeStatus DecodeI64RegsRegisterClass ( MCInst & Inst, unsigned RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 156 of file SparcDisassembler.cpp.

References DecodeIntRegsRegisterClass().

DecodeIntPairRegisterClass()

DecodeStatus DecodeIntPairRegisterClass ( MCInst & Inst, unsigned RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 232 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, IntPairDecoderTable, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.

DecodeIntRegsRegisterClass()

DecodeStatus DecodeIntRegsRegisterClass ( MCInst & Inst, unsigned RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 146 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, IntRegDecoderTable, Reg, and llvm::MCDisassembler::Success.

Referenced by DecodeI64RegsRegisterClass().

DecodePRRegsRegisterClass()

DecodeStatus DecodePRRegsRegisterClass ( MCInst & Inst, unsigned RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 223 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, PRRegDecoderTable, and llvm::MCDisassembler::Success.

DecodeQFPRegsRegisterClass()

DecodeStatus DecodeQFPRegsRegisterClass ( MCInst & Inst, unsigned RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 182 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, QFPRegDecoderTable, Reg, and llvm::MCDisassembler::Success.

DecodeSIMM13()

DecodeStatus DecodeSIMM13 ( MCInst & MI, unsigned insn, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 285 of file SparcDisassembler.cpp.

References assert(), llvm::MCOperand::createImm(), llvm::isUInt(), MI, llvm::SignExtend64(), and llvm::MCDisassembler::Success.

DecodeSIMM5()

DecodeStatus DecodeSIMM5 ( MCInst & MI, unsigned insn, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 278 of file SparcDisassembler.cpp.

References assert(), llvm::MCOperand::createImm(), llvm::isUInt(), MI, llvm::SignExtend64(), and llvm::MCDisassembler::Success.

LLVMInitializeSparcDisassembler()

LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcDisassembler

(

)

Definition at line 54 of file SparcDisassembler.cpp.

References createSparcDisassembler(), llvm::getTheSparcelTarget(), llvm::getTheSparcTarget(), llvm::getTheSparcV9Target(), and llvm::TargetRegistry::RegisterMCDisassembler().

readInstruction32()

DecodeStatus readInstruction32 ( ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t & Size, uint32_t & Insn, bool IsLittleEndian )

static

Read four bytes from the ArrayRef and return 32 bit word.

Definition at line 305 of file SparcDisassembler.cpp.

References llvm::big, llvm::ArrayRef< T >::data(), llvm::MCDisassembler::Fail, llvm::little, llvm::support::endian::read(), Size, llvm::ArrayRef< T >::size(), and llvm::MCDisassembler::Success.

tryAddingSymbolicOperand()

bool tryAddingSymbolicOperand ( int64_t Value, bool isBranch, uint64_t Address, uint64_t Offset, uint64_t Width, MCInst & MI, const MCDisassembler * Decoder )

static

Definition at line 261 of file SparcDisassembler.cpp.

References isBranch(), MI, llvm::Offset, and llvm::MCDisassembler::tryAddingSymbolicOperand().

Referenced by DecodeCall(), and DecodeDisp().

Variable Documentation

ASRRegDecoderTable

unsigned ASRRegDecoderTable[]

staticconstexpr

Initial value:

= {
    SP::Y,     SP::ASR1,  SP::ASR2,  SP::ASR3,  SP::ASR4,  SP::ASR5,  SP::ASR6,
    SP::ASR7,  SP::ASR8,  SP::ASR9,  SP::ASR10, SP::ASR11, SP::ASR12, SP::ASR13,
    SP::ASR14, SP::ASR15, SP::ASR16, SP::ASR17, SP::ASR18, SP::ASR19, SP::ASR20,
    SP::ASR21, SP::ASR22, SP::ASR23, SP::ASR24, SP::ASR25, SP::ASR26, SP::ASR27,
    SP::ASR28, SP::ASR29, SP::ASR30, SP::ASR31}

Definition at line 108 of file SparcDisassembler.cpp.

Referenced by DecodeASRRegsRegisterClass().

CPPairDecoderTable

uint16_t CPPairDecoderTable[]

staticconstexpr

Initial value:

= {
  SP::C0_C1,   SP::C2_C3,   SP::C4_C5,   SP::C6_C7,
  SP::C8_C9,   SP::C10_C11, SP::C12_C13, SP::C14_C15,
  SP::C16_C17, SP::C18_C19, SP::C20_C21, SP::C22_C23,
  SP::C24_C25, SP::C26_C27, SP::C28_C29, SP::C30_C31
}

Definition at line 138 of file SparcDisassembler.cpp.

Referenced by DecodeCoprocPairRegisterClass().

CPRegDecoderTable

unsigned CPRegDecoderTable[]

staticconstexpr

Initial value:

= {
  SP::C0,  SP::C1,  SP::C2,  SP::C3,
  SP::C4,  SP::C5,  SP::C6,  SP::C7,
  SP::C8,  SP::C9,  SP::C10, SP::C11,
  SP::C12, SP::C13, SP::C14, SP::C15,
  SP::C16, SP::C17, SP::C18, SP::C19,
  SP::C20, SP::C21, SP::C22, SP::C23,
  SP::C24, SP::C25, SP::C26, SP::C27,
  SP::C28, SP::C29, SP::C30, SP::C31
}

Definition at line 127 of file SparcDisassembler.cpp.

Referenced by DecodeCoprocRegsRegisterClass().

DFPRegDecoderTable

unsigned DFPRegDecoderTable[]

staticconstexpr

Initial value:

= {
  SP::D0,   SP::D16,  SP::D1,   SP::D17,
  SP::D2,   SP::D18,  SP::D3,   SP::D19,
  SP::D4,   SP::D20,  SP::D5,   SP::D21,
  SP::D6,   SP::D22,  SP::D7,   SP::D23,
  SP::D8,   SP::D24,  SP::D9,   SP::D25,
  SP::D10,  SP::D26,  SP::D11,  SP::D27,
  SP::D12,  SP::D28,  SP::D13,  SP::D29,
  SP::D14,  SP::D30,  SP::D15,  SP::D31 }

Definition at line 85 of file SparcDisassembler.cpp.

Referenced by DecodeDFPRegsRegisterClass().

FCCRegDecoderTable

unsigned FCCRegDecoderTable[]

staticconstexpr

Initial value:

= {
  SP::FCC0, SP::FCC1, SP::FCC2, SP::FCC3 }

Definition at line 105 of file SparcDisassembler.cpp.

Referenced by DecodeFCCRegsRegisterClass().

FPRegDecoderTable

unsigned FPRegDecoderTable[]

staticconstexpr

Initial value:

= {
  SP::F0,   SP::F1,   SP::F2,   SP::F3,
  SP::F4,   SP::F5,   SP::F6,   SP::F7,
  SP::F8,   SP::F9,   SP::F10,  SP::F11,
  SP::F12,  SP::F13,  SP::F14,  SP::F15,
  SP::F16,  SP::F17,  SP::F18,  SP::F19,
  SP::F20,  SP::F21,  SP::F22,  SP::F23,
  SP::F24,  SP::F25,  SP::F26,  SP::F27,
  SP::F28,  SP::F29,  SP::F30,  SP::F31 }

Definition at line 75 of file SparcDisassembler.cpp.

Referenced by DecodeFPRegsRegisterClass().

IntPairDecoderTable

uint16_t IntPairDecoderTable[]

staticconstexpr

Initial value:

= {
  SP::G0_G1, SP::G2_G3, SP::G4_G5, SP::G6_G7,
  SP::O0_O1, SP::O2_O3, SP::O4_O5, SP::O6_O7,
  SP::L0_L1, SP::L2_L3, SP::L4_L5, SP::L6_L7,
  SP::I0_I1, SP::I2_I3, SP::I4_I5, SP::I6_I7,
}

Definition at line 120 of file SparcDisassembler.cpp.

Referenced by DecodeIntPairRegisterClass().

IntRegDecoderTable

unsigned IntRegDecoderTable[]

staticconstexpr

Initial value:

= {
  SP::G0,  SP::G1,  SP::G2,  SP::G3,
  SP::G4,  SP::G5,  SP::G6,  SP::G7,
  SP::O0,  SP::O1,  SP::O2,  SP::O3,
  SP::O4,  SP::O5,  SP::O6,  SP::O7,
  SP::L0,  SP::L1,  SP::L2,  SP::L3,
  SP::L4,  SP::L5,  SP::L6,  SP::L7,
  SP::I0,  SP::I1,  SP::I2,  SP::I3,
  SP::I4,  SP::I5,  SP::I6,  SP::I7 }

Definition at line 65 of file SparcDisassembler.cpp.

Referenced by DecodeIntRegsRegisterClass(), and DecodeIntRegsRegisterClass().

PRRegDecoderTable

unsigned PRRegDecoderTable[]

staticconstexpr

Initial value:

= {
    SP::TPC,     SP::TNPC,       SP::TSTATE,   SP::TT,       SP::TICK,
    SP::TBA,     SP::PSTATE,     SP::TL,       SP::PIL,      SP::CWP,
    SP::CANSAVE, SP::CANRESTORE, SP::CLEANWIN, SP::OTHERWIN, SP::WSTATE}

Definition at line 115 of file SparcDisassembler.cpp.

Referenced by DecodePRRegsRegisterClass().

QFPRegDecoderTable

unsigned QFPRegDecoderTable[]

staticconstexpr

Initial value:

= {
  SP::Q0,  SP::Q8,   ~0U,  ~0U,
  SP::Q1,  SP::Q9,   ~0U,  ~0U,
  SP::Q2,  SP::Q10,  ~0U,  ~0U,
  SP::Q3,  SP::Q11,  ~0U,  ~0U,
  SP::Q4,  SP::Q12,  ~0U,  ~0U,
  SP::Q5,  SP::Q13,  ~0U,  ~0U,
  SP::Q6,  SP::Q14,  ~0U,  ~0U,
  SP::Q7,  SP::Q15,  ~0U,  ~0U }

Definition at line 95 of file SparcDisassembler.cpp.

Referenced by DecodeQFPRegsRegisterClass().