21#ifndef LLVM_ANALYSIS_TARGETTRANSFORMINFO_H
22#define LLVM_ANALYSIS_TARGETTRANSFORMINFO_H
128 Type *RetTy =
nullptr;
169 return Arguments.empty();
217class TargetTransformInfo;
237 std::unique_ptr<const TargetTransformInfoImplBase> Impl);
260 FunctionAnalysisManager::Invalidator &) {
350 static_assert(
sizeof(PointersChainInfo) == 4,
"Was size increase justified?");
358 const PointersChainInfo &
Info,
Type *AccessTy,
511 LLVM_ABI std::pair<const Value *, unsigned>
713 LLVM_ABI std::optional<Instruction *>
720 bool &KnownBitsComputed)
const;
727 SimplifyAndSetOp)
const;
771 int64_t BaseOffset,
bool HasBaseReg,
772 int64_t Scale,
unsigned AddrSpace = 0,
774 int64_t ScalableOffset = 0)
const;
840 Align Alignment)
const;
844 Align Alignment)
const;
848 Align Alignment)
const;
860 unsigned AddrSpace)
const;
864 Type *DataType)
const;
905 bool HasBaseReg, int64_t Scale,
906 unsigned AddrSpace = 0)
const;
950 unsigned ScalarOpdIdx)
const;
1031 bool IsZeroCmp)
const;
1064 unsigned *
Fast =
nullptr)
const;
1210 Type *Ty =
nullptr)
const;
1263 Type *ScalarValTy)
const;
1269 const Instruction &
I,
bool &AllowPromotionWithoutCommonHeader)
const;
1317 unsigned NumStridedMemAccesses,
1318 unsigned NumPrefetches,
1319 bool HasCall)
const;
1352 unsigned Opcode,
Type *InputTypeA,
Type *InputTypeB,
Type *AccumType,
1384 unsigned Opcode,
Type *Ty,
1389 const TargetLibraryInfo *TLibInfo =
nullptr)
const;
1399 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
1400 const SmallBitVector &OpcodeMask,
1411 ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy,
1412 ArrayRef<int> Mask = {},
1494 unsigned Index = -1,
1495 const Value *Op0 =
nullptr,
1496 const Value *Op1 =
nullptr)
const;
1510 ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx)
const;
1520 unsigned Index = -1)
const;
1528 unsigned Index)
const;
1542 Type *EltTy,
int ReplicationFactor,
int VF,
const APInt &DemandedDstElts,
1575 unsigned Opcode,
Type *DataTy,
const Value *
Ptr,
bool VariableMask,
1588 unsigned Opcode,
Type *DataTy,
bool VariableMask,
Align Alignment,
1602 unsigned Opcode,
Type *DataTy,
const Value *
Ptr,
bool VariableMask,
1620 bool UseMaskForCond =
false,
bool UseMaskForGaps =
false)
const;
1625 return FMF && !(*FMF).allowReassoc();
1653 unsigned Opcode,
VectorType *Ty, std::optional<FastMathFlags> FMF,
1666 bool IsUnsigned,
unsigned RedOpcode,
Type *ResTy,
VectorType *Ty,
1675 std::optional<FastMathFlags> FMF,
1729 bool CanCreate =
true)
const;
1734 unsigned DestAddrSpace,
Align SrcAlign,
Align DestAlign,
1735 std::optional<uint32_t> AtomicElementSize = std::nullopt)
const;
1745 unsigned RemainingBytes,
unsigned SrcAddrSpace,
unsigned DestAddrSpace,
1747 std::optional<uint32_t> AtomicCpySize = std::nullopt)
const;
1762 unsigned DefaultCallPenalty)
const;
1800 unsigned AddrSpace)
const;
1805 unsigned AddrSpace)
const;
1817 unsigned ChainSizeInBytes,
1823 unsigned ChainSizeInBytes,
1981 std::unique_ptr<const TargetTransformInfoImplBase> TTIImpl;
2014 : TTICallback(Arg.TTICallback) {}
2016 : TTICallback(
std::
move(Arg.TTICallback)) {}
2018 TTICallback =
RHS.TTICallback;
2022 TTICallback = std::move(
RHS.TTICallback);
2054 std::optional<TargetTransformInfo> TTI;
2056 virtual void anchor();
This file implements a class to represent arbitrary precision integral constant values and operations...
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Atomic ordering constants.
Analysis containing CSE Info
static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))
TargetTransformInfo::VPLegalization VPLegalization
static cl::opt< bool > ForceNestedLoop("force-nested-hardware-loop", cl::Hidden, cl::init(false), cl::desc("Force allowance of nested hardware loops"))
static cl::opt< bool > ForceHardwareLoopPHI("force-hardware-loop-phi", cl::Hidden, cl::init(false), cl::desc("Force hardware loop counter to be updated through a phi"))
This header defines various interfaces for pass management in LLVM.
This file defines an InstructionCost class that is used when calculating the cost of an instruction,...
const AbstractManglingParser< Derived, Alloc >::OperatorInfo AbstractManglingParser< Derived, Alloc >::Ops[]
mir Rename Register Operands
uint64_t IntrinsicInst * II
static cl::opt< RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode > Mode("regalloc-enable-advisor", cl::Hidden, cl::init(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Default), cl::desc("Enable regalloc advisor mode"), cl::values(clEnumValN(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Default, "default", "Default"), clEnumValN(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Release, "release", "precompiled"), clEnumValN(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Development, "development", "for training")))
Class for arbitrary precision integers.
an instruction to allocate memory on the stack
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Class to represent array types.
A cache of @llvm.assume calls within a function.
LLVM Basic Block Representation.
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Conditional or Unconditional Branch instruction.
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
This is an important base class in LLVM.
A parsed version of the target data layout string in and methods for querying it.
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
Convenience struct for specifying and reasoning about fast-math flags.
ImmutablePass class - This class is used to provide information that does not need to be run.
The core instruction combiner logic.
static InstructionCost getInvalid(CostType Val=0)
Class to represent integer types.
Drive the analysis of interleaved memory accesses in the loop.
FastMathFlags getFlags() const
const TargetLibraryInfo * getLibInfo() const
const SmallVectorImpl< Type * > & getArgTypes() const
Type * getReturnType() const
bool skipScalarizationCost() const
const SmallVectorImpl< const Value * > & getArgs() const
LLVM_ABI IntrinsicCostAttributes(Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarCost=InstructionCost::getInvalid(), bool TypeBasedOnly=false, TargetLibraryInfo const *LibInfo=nullptr)
InstructionCost getScalarizationCost() const
const IntrinsicInst * getInst() const
Intrinsic::ID getID() const
bool isTypeBasedOnly() const
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
An instruction for reading from memory.
LoopVectorizationLegality checks if it is legal to vectorize a loop, and to what vectorization factor...
Represents a single loop in the control flow graph.
A set of analyses that are preserved following a run of a transformation pass.
Analysis providing profile information.
The RecurrenceDescriptor is used to identify recurrences variables in a loop.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
An instruction for storing to memory.
Analysis pass providing the TargetTransformInfo.
TargetIRAnalysis(const TargetIRAnalysis &Arg)
TargetIRAnalysis & operator=(const TargetIRAnalysis &RHS)
LLVM_ABI Result run(const Function &F, FunctionAnalysisManager &)
TargetTransformInfo Result
LLVM_ABI TargetIRAnalysis()
Default construct a target IR analysis.
TargetIRAnalysis & operator=(TargetIRAnalysis &&RHS)
TargetIRAnalysis(TargetIRAnalysis &&Arg)
Provides information about what library functions are available for the current target.
The instances of the Type class are immutable: once they are created, they are never changed.
This is the common base class for vector predication intrinsics.
LLVM Value Representation.
Base class of all SIMD vector types.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
@ Fast
Attempts to make calls as fast as possible (e.g.
@ C
The default llvm calling convention, compatible with C.
This namespace contains an enum with a value for every intrinsic/builtin function known by LLVM.
friend class Instruction
Iterator for Instructions in a `BasicBlock.
This is an optimization pass for GlobalISel generic memory operations.
FunctionAddr VTableAddr Value
LLVM_ATTRIBUTE_VISIBILITY_DEFAULT AnalysisKey InnerAnalysisManagerProxy< AnalysisManagerT, IRUnitT, ExtraArgTs... >::Key
AtomicOrdering
Atomic ordering for LLVM's memory model.
@ LLVM_MARK_AS_BITMASK_ENUM
FunctionAddr VTableAddr uintptr_t uintptr_t Data
LLVM_ABI ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)
Create an analysis pass wrapper around a TTI object.
RecurKind
These are the kinds of recurrences that we support.
ArrayRef(const T &OneElt) -> ArrayRef< T >
constexpr unsigned BitWidth
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
@ DataAndControlFlowWithoutRuntimeCheck
Use predicate to control both data and control flow, but modify the trip count so that a runtime over...
@ DataWithEVL
Use predicated EVL instructions for tail-folding.
@ DataAndControlFlow
Use predicate to control both data and control flow.
@ DataWithoutLaneMask
Same as Data, but avoids using the get.active.lane.mask intrinsic to calculate the mask and instead i...
AnalysisManager< Function > FunctionAnalysisManager
Convenience typedef for the Function analysis manager.
Implement std::hash so that hash_code can be used in STL containers.
This struct is a compact representation of a valid (non-zero power of two) alignment.
A CRTP mix-in that provides informational APIs needed for analysis passes.
A special type used by analysis passes to provide an address that identifies that particular analysis...
Attributes of a target dependent hardware loop.
LLVM_ABI bool canAnalyze(LoopInfo &LI)
HardwareLoopInfo()=delete
LLVM_ABI bool isHardwareLoopCandidate(ScalarEvolution &SE, LoopInfo &LI, DominatorTree &DT, bool ForceNestedLoop=false, bool ForceHardwareLoopPHI=false)
Information about a load/store intrinsic defined by the target.
SmallVector< InterestingMemoryOperand, 1 > InterestingOperands
unsigned short MatchingId
Value * PtrVal
This is the pointer that the intrinsic is loading from or storing to.
InterleavedAccessInfo * IAI
TailFoldingInfo(TargetLibraryInfo *TLI, LoopVectorizationLegality *LVL, InterleavedAccessInfo *IAI)
LoopVectorizationLegality * LVL