Chapter - PLC Operation
A simple computer
K e y b o a rd
(In p u t )
x86
C PU
S e r ia l
M o use
(In p u t )
1 G B M e m o ry
(S to ra g e )
S V G A S c re e n
( O u tp u t )
3 0 G B D is k
( S to ra g e )
A computer in more detail
in p u t s
K e y b o a rd
in p u t c ir c u it s
c o m p u te r
o u tp u ts
In p u t U a rt
x86 C P U
M o use
o u t p u t c ir c u it s
G r a p h ic s
c a rd
M o n it o r
S e r ia l I n p u t U a r t
D ig it a l o u t p u t
D is k C o n t r o lle r
M e m o ry IC s
D is k
s to ra g e
L E D d is p la y
The PLC Scan
Self input logic output Self input logic output Self input logic
test scan solve scan
test scan solve scan
test scan solve
ranges from <1 to 100 ms are possible
time
PLC turns on
SELF TEST - Checks to see if all cards error free, reset watch-dog timer, etc. (A watchdog
timer will cause an error, and shut down the PLC if not reset within a short period of
time - this would indicate that the ladder logic is not being scanned normally).
INPUT SCAN - Reads input values from the chips in the input cards, and copies their values to memory. This makes the PLC operation faster, and avoids cases where an input
changes from the start to the end of the program (e.g., an emergency stop). There are
special PLC functions that read the inputs directly, and avoid the input tables.
LOGIC SOLVE/SCAN - Based on the input table in memory, the program is executed 1
step at a time, and outputs are updated. This is the focus of the later sections.
OUTPUT SCAN - The output table is copied from memory to the output chips. These
chips then drive the output devices.
PLC Status
Power On
Program Running
Programming Mode
Fault
Other Issues
Memory Types
Software Based PLCs
Execution Sequence
1
3
4
10
11
Repeated Outputs
A
PLC First Scan
f ir s t s c a n
S :F S
c le a r
lig h t
lig h t