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Lecture 31

- A review session for the final exam will be held on Thursday May 15 from 2-5 PM in room 277 Cory. - The final exam will take place on Friday May 23 from 12:30-3:30 PM in Sibley Auditorium. Students can bring 7 pages of notes and a calculator. - The lecture outlines fundamental concepts of semiconductor devices and carrier transport mechanisms. It reviews topics such as intrinsic carrier concentration, carrier concentrations in doped semiconductors, the Fermi function, and drift and diffusion currents.

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Milian Peres
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0% found this document useful (0 votes)
77 views15 pages

Lecture 31

- A review session for the final exam will be held on Thursday May 15 from 2-5 PM in room 277 Cory. - The final exam will take place on Friday May 23 from 12:30-3:30 PM in Sibley Auditorium. Students can bring 7 pages of notes and a calculator. - The lecture outlines fundamental concepts of semiconductor devices and carrier transport mechanisms. It reviews topics such as intrinsic carrier concentration, carrier concentrations in doped semiconductors, the Fermi function, and drift and diffusion currents.

Uploaded by

Milian Peres
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 15

Lecture #31

ANNOUNCEMENTS
TAs will hold a review session on Thursday May 15:
2-5 PM, 277 Cory
Final Exam will take place on Friday May 23:
12:30-3:30 PM, Sibley Auditorium (Bechtel Bldg.)
Closed book; 7 pgs of notes + calculator allowed

OUTLINE
Review of Fundamental Concepts

Spring 2003

EE130 Lecture 31, Slide 1

Intrinsic Carrier Concentration ni = N c N v e

E g / kT

conduction

ni 1010 cm-3 at room temperature


Spring 2003

EE130 Lecture 31, Slide 2

Charge-Carrier Concentrations
ND: ionized donor concentration (cm-3)
NA: ionized acceptor concentration (cm-3)

Note: Carrier concentrations depend


on net dopant concentration (ND - NA) !
Spring 2003

EE130 Lecture 31, Slide 3

increasing electron energy

increasing hole energy

Energy Band Diagram


electron kinetic energy

Ec

Ev
hole kinetic energy

distance in semiconductor

Spring 2003

EE130 Lecture 31, Slide 4

Fermi Function
f (E) =

1
1 + e ( E EF ) / kT

f ( E ) e ( E E F ) / kT if E-E F > 3kT


Spring 2003

EE130 Lecture 31, Slide 5

Relationship between EF and n,p

n = ni e ( E F Ei ) / kT
= N c e ( Ec E F ) / kT
p = ni e ( Ei E F ) / kT
= N v e ( E F Ev ) / kT
Spring 2003

EE130 Lecture 31, Slide 6

Free Carriers in Semiconductors


Three primary types of carrier action occur
inside a semiconductor:
drift

diffusion

kT
q

recombination-generation

Spring 2003

EE130 Lecture 31, Slide 7

Net Generation Rate


The net generation rate is given by
2

p n
ni np
=
=
t t p (n + n1 ) + n ( p + p1 )
where n1 ni e ( ET Ei ) / kT and p1 ni e ( Ei ET ) / kT
ET = trap - state energy level

Spring 2003

EE130 Lecture 31, Slide 8

Drift and Resistivity


Electrons and holes moving under the influence of an
electric field can be modelled as quasi-classical
particles with average drift velocity

|vd| =
The conductivity of a semiconductor is dependent on
the carrier concentrations and mobilities

= qnn + qpp
Resistivity

Spring 2003

1
qn n + qp p

EE130 Lecture 31, Slide 9

Mobility Dependence on Doping


1600

1400

E lectrons

1000

-1

-1

Mobility (cm V s )

1200

=
=

phonon

phonon

impurity

impurity

800
600
400

H o les

200
0
1E 14

1E 15

1E 16

1E 17

1E 18

T otal
Im p urity
C on ce nra tio nN(a
to m s
Total
Doping
Concentration
A + ND
Spring 2003

1E 19

1E 20

-3

cm -3) )
(cm

EE130 Lecture 31, Slide 10

Total Current
J = JN + JP
JN = JN,drift + JN,diff = qnn
JP = JP,drift + JP,diff = qpp

Spring 2003

qDN

qDP

dn
dx

dp
dx

EE130 Lecture 31, Slide 11

Electrostatic Variables
V=

1
( Ereference Ec )
q

1 dE
= dV
=
dx q dx

d
=
dx

Spring 2003

EE130 Lecture 31, Slide 12

Continuity
Equations:

Minority
Carrier
Diffusion
Equations:
Spring 2003

n 1 J n ( x ) n
=

+ GL
n
t q x
p
1 J p ( x ) p
=

+ GL
p
t
q x

n p
t

= DN

2 n p
x 2

n p

+ GL

pn
1 2 pn pn
= DP

+ GL
p
t
q x 2
EE130 Lecture 31, Slide 13

Work Function
0: vacuum energy level

M: metal work function


Spring 2003

S: semiconductor work function

EE130 Lecture 31, Slide 14

Schottky Diode

VA > 0

W=

C =

Bn = M

2 s (Vbi V A )
qN D

s
W

VA < 0

I = AT 2 J S (e qV A / kT 1)

where J S = 120e q B / kT A/cm 2

Fermi level splits into two levels (EFM and EFS) separated by qVA
Spring 2003

EE130 Lecture 31, Slide 15

pn Junction Electrostatics

Spring 2003

EE130 Lecture 31, Slide 16

pn Junction Electrostatics, VA 0
Built-in potential Vbi (non-degenerate doping):
Vbi =

kT N A kT N D kT N A N D

+
=
ln
ln
ln
q ni q ni q ni 2

Depletion width W :
W = x p + xn =

xp =
Spring 2003

1
2 s
1

(Vbi V A )
+
q
N A ND

ND
W
N A + ND

xn =

NA
W
N A + ND

EE130 Lecture 31, Slide 17

Avalanche Breakdown Mechanism


High E-field:

VBR

if VBR >> Vbi

2qN

increases slightly with N:


For 1014 cm-3 < N < 1018 cm-3,

Small E-field:

Spring 2003

crit

s crit

105 V/cm <

crit

< 106 V/cm

EE130 Lecture 31, Slide 18

Law of the Junction


The voltage VA applied to a pn junction falls mostly across
the depletion region (assuming that low-level injection
conditions prevail in the quasi-neutral regions).
We can draw 2 quasi-Fermi levels in the depletion region:

p = ni e ( Ei FP ) / kT
n = ni e ( FN Ei ) / kT
pn = ni2e( Ei FP ) / kT e( FN Ei ) / kT
= ni2e( FN FP ) / kT
pn = ni2e qVA / kT
Spring 2003

EE130 Lecture 31, Slide 19

Excess Carrier Concentrations at xp, xn


p-side

n-side

p p ( x p ) = N A

nn ( xn ) = N D

ni2 e qVA / kT
n p ( x p ) =
NA

ni2 e qVA / kT
p n ( xn ) =
ND

= n p 0 e qVA / kT

= pn 0 e qVA / kT

ni2 qVA / kT
n p ( x p ) =
e
1
NA
Spring 2003

ni2 qVA / kT
pn ( xn ) =
e
1
ND

EE130 Lecture 31, Slide 20

10

pn Diode I-V Characteristic


dn p ( x' ' )

p-side: J n = qDn

dx ' '

n-side: J p = qD p

J = Jn

x= x p

=q

Dn
n p 0 (e qVA
Ln

Dp
dpn ( x' )
=q
pn 0 (e qVA
dx'
Lp
+ Jp

x = xn

= Jn

x =0

D
D p qVA
J = qni2 n +
( e
L
N
L
N

p D
n A
Spring 2003

+ Jp
kT

kT

1)e x '' Ln

kT

1)e

x' Lp

x = 0

1)

EE130 Lecture 31, Slide 21

pn Junction Capacitance
2 types of capacitance associated with a pn junction:
1. CJ

depletion capacitance

CJ
2. CD

dQdep
dVA

=A

s
W

diffusion capacitance (due to variation of


stored minority charge in the quasi-neutral
regions)

For a one-sided p+n junction (QP >> QN ):


CD =
Spring 2003

p I DC
dQ
dI
= p
= pG =
dV A
dV A
kT / q
EE130 Lecture 31, Slide 22

11

Deviations from the Ideal I-V Behavior


Resulting from
recombination/generation in the depletion region
series resistance
high-level injection

Spring 2003

EE130 Lecture 31, Slide 23

Transient Response of pn Diode


Because of CD, the voltage across the pn junction
depletion region cannot be changed instantaneously.
(The delay in switching between the ON and OFF states is due to
the time required to change the amount of excess minority carriers
stored in the quasi-neutral regions.)

Turn-off transient:

Spring 2003

EE130 Lecture 31, Slide 24

12

Minority-Carrier Injection & Collection


Under forward bias, minority carriers are injected
into the quasi-neutral regions of the diode.
Current flowing across junction is comprised of hole and
electron components

Under reverse bias, minority carriers are collected


into the quasi-neutral regions of the diode. (Minority
carriers within a diffusion length of the depletion
region will diffuse into the depletion region and then
be swept across the junction by the electric field)
Current flowing depends on the rate at which minority
carriers are supplied
Spring 2003

EE130 Lecture 31, Slide 25

MOS Band Diagrams (n-type Si)


Decrease VG (toward more negative values)
-> move the gate energy-bands up, relative to the Si
decrease VG

Accumulation
VG > VFB
Electrons
accumulate at
surface
Spring 2003

decrease VG

Depletion
VG < VFB
Electrons
repelled
from surface
EE130 Lecture 31, Slide 26

Inversion
VG < VT
Surface
becomes
p-type

VG = VFB + Vox + s

13

Biasing Conditions for p-type Si


increase VG

VG = VFB

VG < VFB

Spring 2003

increase VG

VT > VG > VFB

EE130 Lecture 31, Slide 27

Wd =

2 Si s
qN A

MOS Charge & Capacitance (p-type Si)


Qacc = Cox (VG VFB )
accumulation

depletion

inversion

C=
VG
VFB

dQs
dVG

VT
Ideal C-V curve

Qinv = Cox (VG VT )

slope = -Cox

VFB = MS

Cox

QF
Cox

2qN A Si (2 B )
VT = VFB + 2 B +
Cox
Spring 2003

VG
VFB
accumulation

VT
depletion

inversion

EE130 Lecture 31, Slide 28

14

VT Adjustment by Back Biasing


In some IC products, VT is dynamically adjusted by
applying a back bias:
When a MOS capacitor is biased into inversion, a pn junction
exists between the surface and the bulk.
If the inversion layer contacts a heavily doped region of the
same type, it is possible to apply a bias to this pn junction
N+ poly-Si
+ + + + + + + +

SiO2

N+

- - - - - - - - -

p-type Si

Spring 2003

VG biased so surface is inverted


Inversion layer contacted by N+ region
Bias VC applied to channel
Reverse bias VB-VC applied btwn
channel & body

EE130 Lecture 31, Slide 29

Effect of VCB on s and VT


Application of reverse bias -> non-equilibrium
2 Fermi levels (one for n-region, one for p-region)
Separation = qVBC s increased by VC

Reverse bias widens Wd, increases Qdep


Qinv decreases with increasing VCB, for a given VGB

VT = VFB + VC + 2 B +

Spring 2003

2qN A Si (2 B + VCB )
Cox

EE130 Lecture 31, Slide 30

15

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