Carbon Nanotube Field Effect Transistors

Development and Perspectives

A. BENFDILA, M. BERD & A. LAKHLEF

Micro and Nanoelectronics Research Group (MNRG), Faculty of Electrical Engineering and
Computer Sciences; University M. Mammeri BP 17 RP Tizi-Ouzou, Algeria
Senior Associate, ICTP-UNESCO-IAEA, Trieste Italy
Email: [email protected]; [email protected]

Abstract:
The present paper treats the Carbon Nanotube Field Effect Transistors (CNFETs) in
terms of new development as a possible future basic element for beyond CMOS technology
used in ultra high scale integration ULSI. The CNFET is studied both in physical as well as
technological point of views aiming a further understanding of the limitations to high
integration density.
The different types of carbon nanotubes (SWNT) and (MWNT) used for electronic and
sensing devices are discussed and the limitations for a higher integration density are
evidenced. The CNFET switching characteristics and the IV characteristics are discussed to
evidence the power dissipation and the switching frequency.

Keywords: Carbon Nanotubes, CNFET, Integrated Circuits, I-V Characteristics,

NanoMOSFET

1. Introduction

The demand for higher computing power, smaller dimensions, and lower power consumption
of integrated circuits leads to a pressing need to downscale semiconductor components [1].
However, shrinking device geometry of conventional MOSFETs leads to complex problems,
such as short-channel effects, gate-leakage current, and high power dissipation. Therefore,
novel structure and materials
such as NanoMOSFETs and
MGMOSFETs, CNFETs, [2,3]
and Molecular Transistors, are
expected to be introduced to
meet the requirements for
scaling. Efforts are concentrated
on the CNFETs issue.

Since the discovery of carbon

nanotubes (CNTs) by Ijima in the
1990s [4,5], increasing pro-gress
has been achieved in both
understanding the fundamental
properties and exploring possible
engineering applications like device Fig.1 Issues for non conventional Nanoelectronics

based CNTs. The possible application for nanoelectronic devices has been extensively
explored since the demonstration of the first CNFETs. Figure 1 shows the different
perspectives for non conventional nanoelectronics.
CNTs are attractive for nano-electronic applications due to their excellent electrical
properties. The phase space for scattering is severely reduced due to the one-dimensional
nature of the density of states. The low scattering probability is responsible for high on-
current in semiconducting CNFETs. Due to the chemical stability and perfection of the CNT
structure carrier mobility is not affected by processing and roughness scattering as it is in the
conventional semi-conductor channel. The fact that there are no dangling bond states at the
surface of CNTs allows for a wide choice of gate insulators. This improves gate control while
meeting gate leakage constrains. The purely one-dimensional transport properties of the
SWCNTs should lead to a suppression of short-channel effects in transistor devices [6].
Furthermore, the conduction and valence bands are symmetric, which is advantageous for
complementary applications, and finally, the combined impact of transport and electrostatic
benefits together with the fact that semiconducting CNTs are unlike silicon, direct-gap
materials, suggests applications in opto-electronics as well.

2. The Carbon Nanotube Field Effect Transistor Principles

The one-dimensional nature of CNTs severely reduces the phase space for scattering,
allowing CNTs to realize maximum possible bulk
mobility of this material. The low scattering probability
and high mobility are responsible for high on-current of
CNT transistors. Furthermore, the chemical stability and
perfection of the CNT structure suggests that the carrier
mobility at high gate fields may not be affected by
processing and roughness scattering as in the
conventional semiconductor channel. Similarly, low
scattering together with the strong chemical bonding and
high thermal conductivity allows metallic CNTs to
withstand extremely high current densities (up to109 A/cm2). Fig.2 To p gate GCNFET After [3]
Electrostatics is improved in these devices as well. The
fact that there are no dangling bond states at the surface
of CNTs allows for a much wider choice of gate
insulators other than conventional SiO2. This improved
gate control without any additional gate leakage becomes
very important in scaled devices with effective SiO2
thickness below 1 nm. Also, the strong one-dimensional
electron confinement and full depletion in the nanometer-
scale diameter of the SW-CNTs (typically 1- 2 nm)
should lead to a suppression of short-channel effects in
transistors [7]. Figure 2 shows a Graphene CNFET and
Fig.3 shows that of Carbon CNFET. The CNFET and
MOSFET show the same characteristics. The equivalency
of CNFET and Nano MOSFET can lead to MOSFET
substitution in VLSI circuits and one can deals with
CNFET VLSI Circuit.
F
ig.3 a) CNFET and b) I-V Characteristics

In a recent work [8] we have modeled the drain current and found it to be the same as that of
the MOSFET in the critical saturation region. Finally, since CNTs can be both metallic and
semiconducting, All-CNT electronics can be envisioned. In this case, metallic CNTs could act
as high current carrying local interconnects while semiconducting CNTs would form the
active devices.
The most important appeal of this approach is an ability to fabricate one of the critical device
dimensions (the CNT diameter) reproducibly using synthetic chemistry. In a recent work on,
we report our own approach of a similar study,aimingtoachievetheunprecedentedpeapod
toDWCNTtransformationatroomtemperatureandinopenair.Theresultsarecompared
with those of the literature based on both microprobe Raman spectroscopy (specifically
through the 2D band) and highresolution transmission electron microscopy (HRTEM)
investigations[9].

3. CNFETs and the Integration Problem

The promising characteristics of individual CNT-FETs

have lead to initial attempts at integration of several CNT-
FETs into useful circuits that can perform a logic operation,
or function as memories or sensors. In the following, we
limit our discussion to advances in logic circuitry. The
CNT logic gates have been, in most cases, based on a
complementary technology analogous to silicon CMOS,
which is important as it may ease integration of CNTs onto
this well established technology. A typical inverter is
shown in Fig.4.
The first complementary (CMOS-like) logic gates were
reported by DERYCKE. In that work, two different
techniques were used to produce n-type devices.
Fig. 4 Inverter Based on Complementary CNFET

An inverter gate was created by combining two CNTFETs: a p-type device in the ambient and
a vacuum annealed n-type device. A more compact and integrated approach uses potassium
doping to convert one of two CNT-FETs built on the same CNT to n-type. The masking of the
other transistor which remained p-type was accomplished by photo-resist. The circuit had a
voltage gain of about two, suggesting that
integration, without signal degradation, of
many devices along a single CNT can be
accomplished.

After the success of the CN Inverter, other

integrated circuits came to substitute that of
conventional technology. Various workers
used different approaches to build p and n
type CNFETs and wired the inverters to build
complex ICs. Figure 5 show a full adder built
using CNFETs.
Fig. 5. Integration of CNFETs (Full Adder)

The two main technology constraints that limit the viability of CNFET technology are the
misaligning of CNTs and the presence of metallic CNTs among the semiconducting CNTs,
while the CNTs are grown or transferred over a substrate. Metallic CNTs are highly
undesirable as they short-circuit the drain and the source of the CNFET. Electrical burning
and Chemical etching of the metallic CNTs are the major techniques addressed so far to
remove or break them.

Zhang et al [10] derive practical processing guidelines for metallic CNT growth and removal,
showing that major technology level advancement is necessary for VLSI scale CNFET circuit
to be possible. Since the metallic CNT constraint would mainly be handled during the
manufacturing stage, we assume that no metallic CNT remains as starting scenario for the
application of our work during the rest of the paper. On the other hand, we take up the
challenge of addressing the issue of misaligned CNTs.

There are a few ways at the physical level to achieve good alignment of CNTs arrays, and a
small percentage of CNTs get yet misaligned and the problem is only partly solved.
In spite of superior device characteristics, CNFET circuits are difficult to realize at large scale
because of some serious manufacturing challenges like variations in doping and diameter of
CNTs, metallic CNTs and misaligned CNTs. Though the diameter and doping variations in
CNTs cause drain current variations, the major challenge is towards handling metallic and
misaligned CNTs as they affect the functionality of the gate.

Since misaligned CNTs cannot be avoided by the known CNFET manufacturing technology,
many efforts are being developed to overcome this drawback. One can distinguish the new
layout technique that is functionally immune to the CNT misaligning which is referred as
misaligned-CNT-immune layouts. This will allow the production of standard VLSI cells as
well as design tools that allow to go from Layouts to physical cells and then to transistors.

4. Perspectives in Nanoelectronics
CNFETs are promising in the future developments on Nanoelectronics. Large scale integrated
circuits are foreseen. FPGA based on CNFETs are introduced [11]. SRAMs using nanotubes
are yet produced and Optoelectronics applications such as Light emitting nanotubes are
reported and produced by IBM Company. Considerable
applications are yet investigated in the fields of sensing and
energy conversions. Figure 6 shows a schematic diagram of
a light detector and solar cell.
The SWCNT light source is a three-terminal device that
involves no doping and also allows control of the emission
intensity and the position of the emitting spot along the
length of the CNT. The diameter of the CNT defines the
wavelength of the emitted light, typically in the infrared
range.
Fig. 6 CNT Solar Cell and Sensing

The reverse process of photocurrent generation with a significant yield by photoexcitation of

a CNTFET device has also been demonstrated. This single CNT device can function as an
electrical switch, a light emitter, or a light detector, depending on the biasing.
The carbon nanoelectronic shows a very interesting perspective as it can serve as a link
between electronics and photonics. This will lead to Integrated Optics and hybrid ICs.
Nanosensors are being realized using carbon nanotubes, this can easily lead to smart IC
including MEMS and NEMS.
5. Conclusion
Despite the spectacular properties of SWCNTs, researchers must overcome many serious
obstacles before a SWCNT-based nanoelectronic and nanotechnology can be implemented.
The main difficulty involves the synthesis of a homogeneous SWCNT material. Currently
used techniques produce a mixture of different-diameter semiconducting and metallic
SWCNTs. Recently, however, significant progress has been made toward a more selective
synthesis.
The high density integration problem will slow down the development of the new data
processors based on CNFETs. Lot of perseverance and efforts should be done towards this
problem. However, this will help in removal of the Si-Nanoelectronics limitations related to
capacitive effects in high frequency operations. Interconnects may be achieved using metallic
CN that can conduct information using light beams.

References
[1] ITRS Roadmap 2001, www.itrs.net
[2] V. K. Khanna. Physics of carrier-transport mechanisms and ultra-small scale phenomena for theoretical
modeling of nanometer MOS transistors from diffusive to ballistic regimes of operation; Physics Report,
Elsevier; Vol. 398; pp.67-131; 2004
[3] S. Frgonse, N. Meng, H.N. Nguyen, & C. Majek, C. Maneux, H.Happy, & T.Zimmer Electrical
Transport Mechanisms in Graphene Transistors; Solid State Electronics; Vol.73, pp. 27-31; 2012
[4] S. Iijima, Helical microtubules of graphitic carbon, Nature, vol. 354, pp. 5658, 1991.
[5] S. Iijima and T. Ichihashi, Single-shell carbon nanotubes of 1 nm diameter, Nature, vol. 363, pp. 603605,
1993.
[3] D. S. Bethune, C. H. Kiang, M. S. Devries, G. Gorman, R. Savoy, J. Vaszquez, and R. Beyers, Cobalt-
catalyzed growth of carbon nanotubes with single atomic layer walls, Nature, vol. 363, pp. 605607, 1993.
[4] M. S. Dresselhaus, G. Dresselhaus, and R. Saito, Carbon fibers based on C 60 and their symmetry, Phys.
Rev. B, vol. 45, pp. 62346242, 1992.
[5] H. Dai, A. Javey, E. Pop, D. Mann and Y. Lu, Electrical transport properties and field effect transistors of
carbon nanotubes, NANO: Brief reports and reviews, Vol. 1, No. 1, p 1 4, 2006
[6] . Javey, J. Guo, M. Paulsson, Q. Wang, D. Mann, M. Lundstrom and H. Dai, High field quasi-ballistic
transport in shoret carbon nanotubes, Physical Review Letters, Vol.92, N 10, pp. 106804-1 106804-4,2004.
[7] J. Appenzeller, Y. Lin, J. Knoch, Z. Chen and P. Avouris, Comparing carbon nanotube transistors Ideal
choice: A novel tunnelling device design, IEEE Transactions on Electron Devices, Vol. 52, N. 12, pp 2568
2576, 2005.
[8] A. Benfdila, A. Abbas, R. Talmat, R. Ro*iccardo and A. Vaseashta,
[9] M. Berd, P. Puech, A. Righi, A. Benfdila, and M. Monthioux; Resonant Laser-Induced Formation of
Double-Walled Carbon Nanotubes from Peapods under Ambient Conditions ; in Press ; Small Wiley-VCH
Verlag ; 2012
[10] Mei Zhang, Shaoli Fang, Anvar A. Zakhidov, Sergey B. Lee, Ali E. Aliev, Christopher D. Williams, Ken R.
Atkinson, Ray H. Baughman; Strong, Transparent, Multifunctional, Carbon Nanotube Sheets; Sciences, Vol
309 (5738); pp.1215-1226; 2005
[11] M. H. Moaiyeria,, A. Jahaniana, K. Navia, Comparative Performance Evaluation of Large FPGAs with
CNFET- and CMOS-based Switches in Nanoscale, Nano-Micro Lett. Vol. 3 no.3, pp. 178-188 ; 2011