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Code: 9A05406 B.Tech III Year II Semester (R09) Regular & Supplementary Examinations May/June 2015

This document contains exam questions for a Computer Organization course. It asks students to answer 5 of 8 questions covering topics like multiprocessors, pipelining, register transfer languages, microinstruction sequencing, BCD multiplication, virtual memory, ROM, RS-232 protocol, input-output processors, parallel processing, instruction and data streams, semaphores, hypercube networks, and serial arbitration logic. The exam is worth a total of 70 marks and students have 3 hours to complete it.

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13 views1 page

Code: 9A05406 B.Tech III Year II Semester (R09) Regular & Supplementary Examinations May/June 2015

This document contains exam questions for a Computer Organization course. It asks students to answer 5 of 8 questions covering topics like multiprocessors, pipelining, register transfer languages, microinstruction sequencing, BCD multiplication, virtual memory, ROM, RS-232 protocol, input-output processors, parallel processing, instruction and data streams, semaphores, hypercube networks, and serial arbitration logic. The exam is worth a total of 70 marks and students have 3 hours to complete it.

Uploaded by

subbu
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Code: 9A05406 R09

B.Tech III Year II Semester (R09) Regular & Supplementary Examinations May/June 2015
COMPUTER ORGANIZATION
(Common to EIE and E.Con.E)
Time: 3 hours Max Marks: 70
Answer any FIVE questions
All questions carry equal marks
*****
1 (a) Discuss in brief about multiprocessors and multicomputers.
(b) Explain the pipelining and superscalar operation.

2 (a) What are register transfer languages?


(b) Draw and explain the bus structure for the data transfer between various registers and the
common bus.

3 (a) Explain the major design considerations in microinstruction sequencing.


(b) The control memory has 4096 words of 24 bits each.
(i) How many bits are there in control address register?
(ii) How many bits are there in each of the four inputs, going as input to the multiplexers?
(iii) How many number of inputs are there in each multiplexer? How many multiplexers are
needed?

4 (a) Explain the algorithm for BCD multiplication.


(b) Write an algorithm for evaluating the square root of a binary fixed point number.

5 (a) What is a virtual memory? Explain its features.


(b) Explain the concept of ROM.

6 (a) Explain the operation of RS 232 protocol with neat sketch.


(b) Describe input-output processor serial communication.

7 (a) What is parallel processing? What is meant by instruction stream and data stream?
(b) How the synchronization problems can be solved by using a semaphore?

8 Explain the following:


(a) Hypercube network.
(b) Serial Arbitration logic.

*****

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