Code: R7220504 R07
B.Tech II Year II Semester (R07) Supplementary Examinations May/June 2015
COMPUTER ORGANIZATION
(Common to CSE, IT, CSS & ECC)
Time: 3 hours Max. Marks: 80
Answer any FIVE questions
All questions carry equal marks
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1 (a) Represent (1259, 125)10 in single precision and double precision IEEE 754 standards.
(b) How do we say one computer is faster than another? What are the measures used to compare
their speeds?
2 (a) Explain the 4-bit arithmetic circuit using multiplexer.
(b) Explain the difference between logic shift and arithmetic shift.
(c) Give the classification of instructions.
3 (a) Describe in detail about address sequencing.
(b) Draw and explain micro programmed control unit.
4 (a) Perform multiplication for the following 6-bit numbers using Booths algorithm.
Multiplicand 0 1 0 1 1 1
Multiplier 1 1 0 1 1 0
Show each step clearly indicating the Booth recording.
(b) Draw and explain the flowchart for floating point addition.
5 (a) What is cache updating? Why is it necessary? Explain different updating systems.
(b) Explain the working of page translation mechanism.
6 (a) Draw and explain the block diagram of I/O system.
(b) Discuss about RS 232C.
7 (a) How does a conditional branch instruction affect the performance of instruction pipelining? Explain
with the help of timing diagram.
(b) What is pipeline processing?
(c) What is instruction pipeline?
8 (a) Draw and explain the distributed shared memory architecture.
(b) What do you mean by bus arbitration? Explain the parallel arbitration technique with the help of
neat diagram.
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