MAHENDRA ENGINEERING COLLEGE L-13
MAHENDHIRAPURI, MALLASAMUDRAM - 637503
ECE Sem /Year:VII/IV
Lecture Handouts
Subject Name: AVIONICS
Staff Name : K.KALAIMAAMANI
Unit : II Date of Lecture:
Topic of Lecture: Design procedure – Half adder – Full Adder
Introduction:
Block diagram of a combinational circuit
Fig 11.1: Combinational Circuit
Combinational logic circuit output variable depended on the combinational of input variables.
It consists of input variable, logic gate output variables no storage involved.
To understand what is a half adder you need to know what is an adder first. Adder circuit is a
combinational digital circuit that is used for adding two numbers.
A typical adder circuit produces a sum bit (denoted by S) and a carry bit (denoted by C) as the
output. Typically adders are realized for adding binary numbers but they can be also realized
for adding other formats like BCD (binary coded decimal), XS-3 etc.
Besides addition, adder circuits can be used for a lot of other applications in digital
electronics like address decoding, table index calculation etc.
Adder circuits are of two types: Half adder ad Full adder.
Prerequisite knowledge for Complete learning of Topic:
Boolean postulates and laws - De-Morgan’s Theorem
Minimization of Boolean expressions and K-map
Detailed content of the Lecture:
Design procedure:
1. The problem definition
2. The determination of number of available input variable and required output variables.
3. Assigning letter symbols to input and output variables.
4. The derivation of truth table indicating the relationships between input and output variables.
5. Obtain simplified Boolean expression for each output
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6. Obtain the logic diagram.
Half Adder:
Fig 11.2: Truth Table for Half Adder
K – map simplification for carry and for sum
Fig 11.3: K Map Simplification-Half Adder
Half adder is a combinational arithmetic circuit that adds two numbers and produces a sum bit
(S) and carry bit (C) as the output.
If A and B are the input bits, then sum bit (S) is the X-OR of A and B and the carry bit (C)
will be the AND of A and B. From this it is clear that a half adder circuit can be easily
constructed using one X-OR gate and one AND gate.
Half adder is the simplest of all adder circuit, but it has a major disadvantage. The half adder
can add only two input bits (A and B) and has nothing to do with the carry if there is any in
the input.
So if the input to a half adder have a carry, then it will be neglected it and adds only the A and
B bits.
That means the binary addition process is not complete and that’s why it is called a half
adder.
The truth table, schematic representation and XOR//AND realization of a half adder are
shown in the figure above.
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Full-Adder:
The half-adder does not take the carry bit from its previous stage into account. This carry bit
from its previous stage is called carry-in bit. A combinational logic circuit that adds two data
bits, A and B, and a carry-in bit, Cin , is called a full-adder.
Fig 11.4: Truth Table for Full Adder
K-map simplification for carry and for sum
for carry for sum
Fig 11.5: K Map Simplification- Full Adder
= AB 1+C + ABCin + ABCin
= AB + ABCin + ABCin
= AB + Cin AB + AB
= AB + Cin A B
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Implementation of full adder
Fig 11.6: Full Adder Using Two half Adder
Video Content / Details of website for further learning (if any):
http://manadld.blogspot.in/2014/09/half-adder-full-adder-experiment.html
http://www.circuitstoday.com/half-adder
http://www.electronicsengineering.nbcafe.in/half-adder-and-full-adder-circuit/
http://www.pyroelectro.com/edu/digital/
http://www.learnabout-electronics.org/Digital/dig11.php
http://www.pyroelectro.com/edu/digital/
Important Books/Journals for further learning including the page nos.:
M. Morris Mano, “Digital Design”, 3rd Edition, Prentice Hall of India Pvt. Ltd., 2003 /
Pearson Education (Singapore) Pvt. Ltd., New Delhi, 2003.
Subject Teacher Verified by HoD/ECE
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