MEGHNAD SAHA INSTITUTE OF TECHNOLOGY
Department of
Lab Manual
Subject Name:- Analogue and Digital Electronics Lab
Subject Code:-
Experiment No: 2
Name of the Experiment:- Realization of Half Adder Circuit and Full Adder Circuit
using two Half-Adders
1. Objective: To study the realization of Half Adder Circuit and Full Adder Circuit using two
Half-adders and verify the truth table.
2. Theory:
Half adder: A half adder is a combinational circuit that performs an addition operation on two
binary digits. The half adder produces a sum and a carry value which are both binary digits. The
drawback of this circuit is that in case of a multi bit addition, it cannot cater to carry.
S = A B
C = A.B
Following is the logic table for a half adder:
Input Output
A B C S
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0
Plotting the above truth table into K-Map
Circuit Diagram:
Full adder
A full adder is a logical circuit that performs an addition operation on three binary digits. The full
adder produces a sum and carries value, which are both binary digits. It can be combined with other
full adders (see below)
S = A B Cin
Cout = ( A.B) + (Cin .( A B)) = ( A.B) + ( B.Cin ) ) + (Cin. A)
Following is the logic table for a full adder
Input Output
A B Cin Cout S
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
Circuit Diagram:
3. Requirement:
1. 5 volt DC regulated power supply
2. Bread Board
3. Digital Multimeter
4. IC-7486, 7432, 7408, 7404.
5. Connecting Wires
6. Cutter
Pin out diagram of IC7486 (XOR) ,IC7432(OR)and IC 7408 (AND) is given below.
4. Observations/Results:
For half adder:
Input Output
A B C S
L.L L.L L.L V.L L.L V.L
0 0
0 1
1 0
1 1
For full adder
Input Output
A B Cin Cout S
L.L L.L L.L L.L V.L L.L V.L
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
5. Discussions & Conclusions:
6. Area of applications:
Any digital arithmetic operations unit like ALU needs an adder circuit.
7. Question Banks:
a) Construct half adder circuit using basic logic gates.
b) Implement half adder circuit using universal gates.
c) Design full adder circuits using basic logic gates only.
d) Design full adder circuits with minimum number of NAND gates.
e) Implement this circuits with half adder and a single AND gate
y = ( A B ).( A.B )
f) Design a full subtractor circuit using two half subtractors.
8. References:
1. Morries Mano- Digital Logic Design- PHI
2. D.Ray Chaudhuri- Digital Circuits-Vol-I & II, 2/e- Platinum Publishers
3. Floyed & Jain- Digital Fundamentals-Pearson.