Sankalchand Patel College of Engineering, Visnagar
Department of Computer Engineering / Information Technology
Sub: Digital Logic Design (130701) Class: BE Sem. III (CE/IT)
LIST OF EXPERIMENTS
1. LOGIC GATES
2. DEMORGAN’S THEOREM
3. UNIVERSAL GATES
4. HALF ADDER AND FULL ADDER
5. HALF SUBSTRACTOR AND FULL SUBSTRACTOR
6. RS & D FLIP FLOP
7. JK& T FLIP FLOP
8. DECODER & DEMULTIFLEXER
9. BINARY CODE TO GRAY CODE CONVERTER
10. BCD TO SEVEN SEGMENT CONVERTER
11 DESIGN COUNTER
12. 4-BIT BIDIRECTIONAL SHIFT REGISTER