Varieties of Threaded C ode for

Language Implementation
Terry Ritter
Gregory Walker
Motorola Inc, Mail Drop M2880
3501 Ed Bluestein Blvd
Austin TX 78721

Between a high-level language (HLL) and its underlying tion is then executed in order to run the program. A com­
machine architecture lurk many language implementa- piler is a computer program that translates high-level
. tion techniques . These include the older techniques of language programs into instructions of another language .
interpretation and compilation, as well as newer ones like Traditionally, assemblers and compilers translate their
intermediate languages and threaded code . In this article, input into machine-level code .
we will present four types of threaded code techniques for Interpretation: Interpretation techniques directly exe­
implementing intermediate languages. We will examine cute the high-level language program . The interpreter is a
how these four logically equivalent techniques offer program that sees the high-level language source program
various trade-offs of execution speed, program storage, as a series of operation (op) codes used to guide its execu­
and use of processor resources . tion. The interpretive system appears to the user as a
"virtual machine" that has the architecture of the high­
lmplemention of a Language level language .
The implementation of a high-level language on Any form of interpretation offers significant oppor­
various logical or physical machine architectures in­ tunities for implementing debugging tools. Tests per­
volves such characteristic trade-offs as size of the formed as each command is interpreted can result in a
language implementation, si�e of generated code, and programmer-controlled display of debugging informa­
speed of program execution . We will bypass other issues tion. This is the basis for trace or breakpoint facilities
of high-level language use (eg: interaction, debugging, that can be included in the interpreter.
testing, etc) and concentrate on language implementation Combinations: Combination techniques may translate
considerations. the sequence of characters representing a high-level­
Language implementation techniques can be logically language keyword into a form that is easier to interpret.
divided into two categories: translation and interpre­ Most BASIC interpreters translate the BASIC keywords
tation. into one-byte tokens that are easier to identify. This
Translation: Translation techniques replace elements technique avoids the continual string searches of a tradi­
of higher-level syntax with lower-level instructions that tional interpreter, but executes a language that is syntac­
perform an equivalent operation. The resulting transla- tically unchanged from the high-level-language source
program. (For our purposes here, the term syntax will
About the Authors specifically refer to the structural relationship between
Terry Ritter and Gregory Walker are software engineers at the language elements . )
Motorola Microprocessor Design Group, wl1ere their exploration into Intermediate language: Intermediate-language (IL)
the structure of computer languages led them to examine FORTH and
other threaded languages for use as a possible software tool. Terry techniques translate the high-level-language programs in­
Ritter is one of the co-architects of the M C6809 m icroprocessor and has to a language that is simultaneously easier to deal with
been involved with personal computing since 1 974. Gregory Walker is and syntactically different from the original . Many com­
on the IEEE floating-point standards committee and has been involved pilers translate a high-level-language program into an
with microcomputers since 1975.
intermediate language, which is then translated into

206 September 1980 © BYTE Publications Inc

Diagnostics 1
for CP/M* & TRSDOS#
Intermediate-language techniques offer
the advantage of machine independence
of the source language .

machine code. When used in this manner, the inter­

mediate language can allow global code-optimization
techniques to be more easily applied.
Since the translation into the intermediate language is
independent of the target machine, different compilers
for the same target machine need only produce the
simpler code of the intermediate language. Similarly, dif­
ferent code generators (which translate the intermediate
language into machine language) can allow the same
compiler to produce code for different computers . Inter­
mediate-language techniques offer the advantage of
machine independence of the source language and allow
program portability, the ability to execute the same
source program on widely different computers.
The intermediate-language representation of a pro­
Someday your computer is going to break; even the most reliable gram might also be interpreted instead of translated to
computer systems "go down". Often, finding exactly what is machine code. To minimize interpretation overhead, we
wrong can account for the most time consuming part of repairing need complex and powerful machine-language routines.
the system, and the longer the system is down, the more But machine independence is best accomplished by hav­
money you lose.
ing . simple, easy-to-write machine-language routines.
DIAGNOSTICS I is a complete program package designed to check
This same trade-off of machine independence versus ex­
every major area of your computer, detect errors, and find the
ecution speed must be made in the design of any inter­
cause of most common computer malfunctions, often before they
become serious. For years, large installations have run daily
mediate language. An example of this use of intermediate
or weekly diagnostic routines as a part of normal system language is the pseudocode {p-code) used to implement
maintenance and check-out procedures. most versions of Pascal .
DIAGNOSTICS I is designed to provide that kind of performance This article is principally concerned with a class of
testing for 8080/Z80 micro computers. intermediate-language representations particularly suited
DIAGNOSTICS I will really put your system through its paces. Each to interpretation; these are known as threaded codes.
test is exhau.stive and thorough. The tests include: Naturally, the intermediate-language code will be
Memory Test
• · CPU Test (8080/8085/Z80 ) · Printer Test generated by a compiler or by some other translation
· Disk Test · CRT Test program. We will not discuss the translation process,
To our knowledge, this is the first CPU test available for 8080/Z80 which is a function of the syntax of the high-level
CPU's. Many times transient problems, usually blamed on bad
language and other programming considerations; rather,
memory, are really CPU errors.
we will discuss the resulting intermediate language and its
A good set of diagnostics is an indispensable addition to your
interpreter.
program library even if your system is working fine. Hours have been

of
w()sted trying to track down a "program bug" when actually
hardware was to blame!
Aspects Intermediate-Language Architecture
An intermediate language is composed of a set of
DIAGNOSTICS I als_o allows you to be confident of your system.
This can be critical when file merges or sorts and backups
primitive operations (which, in combination, can express
are involved. You want to be as sure of your computer as possible any algorithm) and storage capabilities for both internal
quring these critical times. Running DIAGNOSTICS I prior to and program data. In particular, it must be possible to
these and other important functions helps to insure that your pass data values between routines that make up the inter­
system is operating at peak performance. mediate language. The intermediate-language program

DIAGNOSTICS 1: $60.00 Manual

DIAGNOSTICS I is supplied on discette with a complete users manual. can use a fixed number of memory locations to simulate
only : $1 5.00 general-purpose registers, but then routines are needed
that load (and store) each register from memory, as well
Require s : 24K CP/M; 1 6K d i sc for TRS-80 as routines that simply move values between registers. If
formats: C P/ M 8" SOFT SECTORED, NORTHSTAR CP/M the intermediate language approaches the complexity of
AND T RS-80 DOS the original machine language, i ts use is of dubious value.
One approach that simplifies an instruction set is a
All Orders and General Information: "zero-address" or stack architecture. In this architecture,
SUPERSOFT ASSOCIATES all operations will obtain values by pulling them from the
P.O. BOX 1 628 stack and results will be returned by pushing them onto
CHAMPAIGN, IL 61 820 the stack. Only two operations with memory are now re­
(217) 359 -2112 quired: the "pull (from stack) and store (to memory)"
Technical Hot Line: (2 17) 359-2691 operation and the "load (from memory) and push (on the
stack)" operation . By designing a zero-address architec-
"CP/ Iro! RfGISHREO IAAD£MARK OIGIIAL R£S£AACH
•TASOOS TRS·BO lRAOEMAR�S lAIIOY CORP (answered only when technician is available)

208 September 1980 © BYTE Publications Inc C i rcle 1 27 on i nquiry card.

 l i s t pointer l D i r e e l - Threaded
Code)

JSR A
JSR 8
( I L c od e ) ( Ma c h i ne Code )

A: m a c h i n e code 8: m a c h i n e code
for call rou t i n e
( I nto r m e d iota - L a n g u a g e cod e ) ( M a c h i n e code )
� L
A· JSR L 8: machine
language � M m a c h i ne code
JSR M routine for next

RTS
� return
RTS

next call return

next call routine

next 1 . copy cu rrent list item to temporary storage
2. point list pointer to next list item
3. jump to machine code at address in
next JSR/ RTS pair temporary storage
call JSR instruction
return RTS instruction call 1. push cu rrent list pointer onto stack
2. load list pointer with address of the
Figure 1 :Diagram of subroutine-threaded code (STC). In this intermediate-language subroutine list
3 . do " next"
and figures 2 thru 4, the poin ter points to the main program be­
ing executed. Both A and B are subprograms called by the main return 1 . load list pointer with top of stack
program; A is an intermediate-language subprogram of the same 2. do " next"
type as the main program, and B is an in-line machine-language
program that directly executes the machine language of the host Figure 2: Diagram of direct-threaded code (DTC). Here, "tem­
computer. The words next, call , and return refer to operations porary storage" refers to a memory location that is used to hold
that must be performed for any threaded-code language. The in­ the address of the machine-code routine associated with the
formation to the right of these words tells how each operation is current unit of code.
performed in the current type of threaded code.

1 12-24 ,
R ETURN: � return

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LA34 DECwriter IV . . . . . . . . . 1 , 095 1 05 59 40 ( I L code ) ( M a c h i n e code )
LA34 DECwriter IV Forms Ctrl. 1 , 295 1 24 69 47
LA1 20 DECwriter Ill KSR . . . 2 , 495 239 140 90
A: � call 8: � 8 STRT

LA180 DECprinter I . . . . . . . . 2 , 095 200 117 75 � L 8STRT: m ac h i n e c od e

VT100 CRT DECscope . . . . . . 1 , 895 1 82 1 01 68 routine
VT1 32 CRT . . . . . . 2 , 295 220 1 22 83
DT80/1 DATAMEDIA CRT . . . 1 91 1 06 72
� R ETURN JMP next
Tl745 Portab l e Term inal . . . . 1 , 595 1 53 85 57
Tl765 Bubble Memory Terminal 2 , 595 249 1 46 94
Tl81 0 RO Printer . . . . . . . . . . 1 , 895 1 82 1 01 68 next call return

Tl820 KSR Printer . . . . . . . . . 2 , 1 95 210 117 79

Tl825 KSR Printer . . . . . . . . . 1 ,595 1 53 85 57
next 1 . copy cu rrent list item to indirect temporary
ADM3A CRT Terminal . . . . . . 875 84 47 32 storage
ADM31 CRT Terminal . . . . . . 1 ,450 1 39 78 53 2. point list pointer to next list item
ADM42 CRT Terminal . . . . . . 2 , 1 95 210 117 79 3. load code temporary storage with item at
QUME Letter Qual ity KSR . . . 3,295 316 176 119 address in indirect temporary storage
QUME Letter RO . . . . 278 1 55 1 05 4. jump to machine code at address in code
HAZELTINE 1 420 CRT . . . . . . . 945 91 51 34 temporary storage
HAZELTI NE 1 500 CRT . . . . . . 1 , 1 95 115 64 43
HAZELTIN E 1 552 CRT . . . . . . 1 24 69 47 call 1 . push current list pointer onto stack
2. point indirect temporary storage to next list
Hewl ett-Packard 2621A CRT . 1 , 495 1 44 80 54
item
Hewl ett-Packard 2621 P CRT . 2 , 650 254 1 42 96
3. load current list pointer from indirect
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ACOUSTIC COUPLERS o MODEMS o THERMAL PAPER return 1 . load cu rrent list pointer from top of stack
RIBBONS o INTERFACE M O D U LES o FLO PY DISK U N ITS P 2. do " next"
DELIVE RY • EFFICIENT SE RVICE

Figure 3 : Diagram of indirect-threaded code (fTC). Here, "in­

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direct temporary storage" and "code temporary storage" store

UNION, N .J. 07083

the indirect and direct pointers to the machine code routine
TWX 7 10-98 5- 548 5 associated with the current unit of code.

210 September 1980 © BYTE Publications Inc C i rcle 1 29 on i nquiry card.

ture into the intermediate language, the parameter trans­
fer location is implied and need not be part of the inter­

Th e
mediate language representation. (A stack architecture is
certainly simpler than other architectures, but that does
not mean it is better; many complex trade-offs that are

2nd Gen eration

beyond the scope of this article are involved . )

is shaping up . . .
Threaded Code
Threaded code is an intermediate-language implemen­
tation technique that organizes the control of program
flow into a sequence of subroutine invocations. No other
aspects of the language are represented in threaded code.
Threaded code is especially applicable to interpretation;
the interpretation process consists of transferring control
to the routines selected by the threaded-code op codes .
The functions available in the intermediate language are
provided by the subroutines that are invoked and are not
an inherent part of the threaded code itself.
[ The characteristics of the language FOR TH are in­
dependent of its current implementation via threaded
code. FORTH enthusiasts often blur the distinction,
attributing the language 's speed and compactness to the
language instead of to its threaded-code implementation .
I think this is an important point t o remember when talk­
ing about the advantages of FORTH. . . . GW)
Threaded-code intermediate languages are especially
applicable to the implementation of virtual machines em­ M EASU REM ENT
i n co rporated
bodying zero-address architectures. As such, the tech­ systems &.. controls
nique of using threaded code to implement a language
can be applied to, for example, Pascal (using the p-code
intermediate language), LISP interpreters, or, of course,

�5����.��. Software
FORTH. We classify four varieties of threaded code:
subroutine, direct, indirect, and token.
All varieties of threaded code consist of a data struc­
ture that is a sequence of unique subroutine identifiers.
Crabt r e e B l v d .
Traditionally, threaded code has been kept close to the R a l e r g h , N o r t h Ca r o l i n a 27604 (9 1 9 ) 833-4094
machine level and has included actual pointers to the
AT LAST' A fu l l y implemen t ed computer based file m a n agement
subroutines (which themselves may be either interme­ a few m i n u t es or i n s t r u c t i o n a n d you arc creating and using your own
diate language or machine code). Also traditionally, a client mailing l i s t s . i n ve n t o r ie s . bibliographies, vendor l i s t s , and more.

portion of the processor resources-in particular, pro­ U H M S 8 0

Files, l i s t s . o r u s e r defined can be created. sorted,
cessor registers-has been dedicated to the use of the edited, and printed Sub-files L" a n b e created o u t o r parts o f
threaded-code interpreter. As we shall see, neither ab­ files, selec t i n g parts of a rec ord or i n d i vidual rc�.:ords by a search n it c r i o n .

solute pointers nor register resources need be used to im­ A L S O available

plement threaded code. R E I' O R T 8 0

Build your custom defined and formatted reports and data summaries.
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Implementing Threaded Structures DBMSSO and R E P O RTSO will r u n under C P/ M o r T R S DOS

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which make up the complete threaded-code interpreter. U t i l i t y which allows you t o and p a t c h a d i s k .

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calls with no other embedded instructions implements an dedu�.: t i o n opt i o n s , ell.: .
intermediate language. Each subroutine call may be con­ \\'rite or �.:all today for further detail.' on our
sidered a single intermediate-language operation, which Source I D#TCE373

need not be related to the underlying machine architec­ AI-'1-'I.E is a lrademarL. u f Appll' l"ttnllllllt'r ( ·urp .
is a lrademurk uf Taml� l"urp.

ture . Subroutine-threaded code (STC ) is a control CI'/M is a lradl'mark uf DiJ,!ilal Hl')ot•arl· h

Owing to a printer error a wrong telephone number was run in

mechanism that is widely supported at the machine­ August. Our apologies for any i nconvenience this caused. Our
hardware level. correct telephone n umber is 91 9-833-4094.
The peculiar program organization consisting only of

Circle 1 30 on i nquiry card. September 1980 © BYTE Publications Inc 211

subroutine calls is rarely used by programmers (who threaded code implementations do not allow the use of
have no reason to resist obvious opportunities for op­ true subroutines at the machine level but instead require
timization), but it is sometimes used by compilers . It is that each routine terminate by executing the next opera­
the most general intermediate language possible, and it tion.
retains the advantages of machine independence by not In order to call direct-threaded routines (see the
generating in-line machine language. (The difference in instructions for "call" in figure 2), machine-language code
the form of subroutine call and return instructions on (executing the instructions for "call") must be included at
various computers is usually trivial . ) the beginning of each direct-threaded routine to put the
Subroutine-threaded code will incur less execution current value of the list pointer on an address stack, load
overhead than most intermediate languages because its the list-pointer register with the start address of the list of
interpretation is handled by hardware rather than by a routine addresses for this just-begun, direct-threaded
sequence of instructions. Furthermore, subroutine­ routine, and execute the next operation.
threaded code can be optimized by using in-line machine The next operation (coded here as in-line machine
code for operations where subroutine overhead is ex­ code) causes the computer to execute the routine pointed
cessive, an advantage unobtainable with other types of to by the list pointer, regardless of whether the routine
threaded code. Of course, the resulting optimized code is pointed to is another intermediate-language routine or a
no longer machine-independent; the additional transla­ machine-language routine.
tion step converts the intermediate language into object In order to return to a higher level of nesting, the last
code for a particular machine. list item in an intermediate-language routine points to the
Direct-threaded code: Direct-threaded code (DTC) code for the return operation . When executed by the next
may be considered a sequence of machine-language sub­ operation, this operation recovers the previous value of
routine calls with the "call" op code removed. This results the list pointer from the stack, then executes the next
in a list of addresses, each of which points to a machine­ operation, which in turn executes the first routine past
language subroutine. Since the direct-threaded program the routine the computer just returned from .
includes no op codes, a short machine-language program Thus direct-threaded code is implemented in three
must be written to read the next address in the list and operations : next, call, and return .
transfer control to that address. Traditional direct- Indirect-threaded code: Indirect-threaded code (ITC)
consists of a list of addresses, but each address points to
another address which then points to the machine-code
TABLE: ( in d e x e d by tok e n ) routine. (See figure 3 . ) As compared to direct-threaded
token A : � A code, in indirect-threaded code, the interpreter must go
token B : � B
through an extra level of indirection . Indirect-threaded
token A
- BST
intermediate-language subroutines do not contain rna­
token bst :
token B chine-language code for the call operation, and one ad­
:
vantage of indirect-threaded code is that a compiler using
t o k e n col/ : -
it need only produce pointers. By manipulating only
col/

t o k e n end : - return
pointers, the compiler generates intermediate-language
( I L code) ( M a c h i n e c od e )
code that does not include machine-language code itself;
thus it is independent of the target machine . However, a
A: token col/ B: t ok e n bst
disadvantage of indirect-threaded code is that the inter­
token L BST: m a c h i ne c o d e
rout ine preter has the overhead of an extra level of indirect ad­
t oken M
dressing.
m a c h i n e code
Token-threaded code: The varieties of threaded code
token end
f o r next previously mentioned contained pointers that were actual
addresses of the subroutines in memory. Using memory
addresses to select routines wastes storage because the
next col/ return
number of subroutines in the system is far smaller than
next 1 . get current token from list the number of memory locations. A savings in inter­
2. point list pointer to next list item mediate-language program size can be obtained by using
3. look up address corresponding to token short tokens to identify the subroutines to be invoked .
4. get indi rect token at address
5 . look up address corresponding to indi rect Typically, token-threaded code (TTC) can be im­
token plemented by using the current token to index into a table
6 . jump to machine code at that address
of subroutine addresses . (See figure 4 . )
call 1 . push cu rrent list pointer onto stack
2. load list pointer with start of new list High-Level Descriptions o f Threaded-Code
3. do " next"
Interpreters
return 1 . load current list pointer from top of stack Listings 1 thru 3 illustrate the logical implementation of
2. do " next" direct-, indirect-, and token-threaded code, respectively.
The program descriptions are written in a high-level
Figure 4: Diagram of token-threaded code (TTC) . Since tokens
language that is similar in appearance to Pascal. It differs
can be made shorter than addresses, this makes the threaded from Pascal in that the variables are not declared as stan­
code more compact, but the table lookup makes the resulting dard Pascal data types . Also, the next, call, and return
code slower. Here, the "indirect token" is the contents of the operations are not written as Pascal procedures; this was
table entry that matches the current token of code. . done to remain faithful to actual implementations where

212 September 1980 © BYTE Publications Inc

these three code segments are reached by jump instruc­ Listing 1: Description of a direct-threaded code interpreter in a
tions rather than by subroutine calls. Pascal-like language. See figure 2 .
Several other notational conventions used in these
c anst p o i n t er_l e n g t h = < l en g t h of an a d dress p o i nter ) ;
listings may also need explanation. The data type pointer c a l l _c o d e _ l e n g t h = ( l en g t h of '' c a l l '' code s e g me n t > i

means an actual machine address. If ip is a pointer var l i s t _p o i n t e r : p o i nter; { i nterpreted p r ogram c ounter }
l i st_item: p o inter; { c on t a i n s t h readed-c o d e i te m }
variable, then - ip means the value at the location label n e x t , c a l L return;

which is pointed to by the address in variable ip . next: l i s t_ i t e m : = "· l i s t _p o i n t e r ;

Therefore, the statement l i s t _p o i n t e r : = l i s t _p o i n t e r
'
+ p o i n t e r _l e n g t h ;
g ot o A i i s t _i t e m ;

ca1 1 : p u s h _o n _s t a c k < l i s t _p o i n t e r ) ;
goto - ip; { The value o f l i s t _i t e m wa s set by t h e preceding
{ ' ' n e x t '' o p e r a t i on .
l i s t_p o i n t e r : = l i s t _i t e m + c a l l _c o d e _l e n g t h ;
means jump to a new location using the contents of The f o l l ow i n g c od e dup l i cates the '' n e x t '' opera t i on.
l i s t _i t e m : = A l i s t _p o i n t e r ;
variable ip as the address at which to proceed with execu­ l i s t _p o i n t e r : = l i s t _p o i n t e r + p o i n t e r _l e n g t h ;
tion. goto A I i s t _i t e rn ;

return: l i s t _p o i n t e r : = p o p _f r om_s t a c k ( ) ;
{ The f o l l owing c od e dup l i cates the '' n e x t '' o p erat i on.
l i st i tem : = A l i s t_p o i n t e r ;
l i s t _p o i n t e r : = l i st-p o inter + p o i n t e r _l e n g t h ;
Implementation Concerns g oto Alist i tem;
traditional implementations of threaded-code
interpreters have had one or more machine registers
dedicated to the exclusive use of the interpreter; imple­
Listing 2:Description of an indirect-threaded code interpreter in
mentations on microcomputers have tended to use all a Pascal-like language. See figure 3.
microprocessor resources . One problem with these imple­
mentations is that all machine-language routines (where c an s t p o i n t e r _l e n g t h = ( le n g t h of an a d dress p o i n te r ) ;
{ interpreted p r o g ram c o unter
all real computation is done) must save processor var l i s t _p o i n t e r :
l i st i te m :
p o inter;
p o inter; { contains threa d e d - c o d e i t em
}
}
registers before modifying them and must restore them c o d e _p o i n t e r : p o inter; { p oints to actual ma c h i n e c ode }
label ne x t , c a l l . r e t u r n ;
before returning to the interpreter.
Additionally, this use of machine resources, simply for ne x t : l i st i te m
l i s t _p o i n t e r
"'· l i s t _p o i n t e r ;
: = l i s t _p o i n t e r + p o i n t e r _ l e n g t h ;
the transfer of control, 'obstructs the use of standard c o d e _p o i n t e r : = "'· l i s t _i t e m ; { h e r e i s t h .e e x t r a
{ leve l of i n d i re c t i o n
machine-language subroutines that pass parameters g ot o A c o d e_p o i n t e r ;

through the registers. In the context of microcomputer ca1 1 : p u s h _o n _ s t a c k ( l i s t _p o i n t e r ) ;

{ The va l u e of l i s t_ i t e m wa s set by the
{ preceding '' n e x t o p er a t i on.
l i s t _p o i n t e r : = l i s t_ i t e m + p o i n t e r_l e n g t h ;
The f o l l ow i n g code d u p l i cates the '' n e x t '' o p er a t i on .
l i s t _i t e m : = "'· l i s t _p o i n t e r ;
l i s t _p o i n t e r : = l i s t _p o i n t e r + p o i n t e r _l e n g t h ;
c o d e _p o i n t e r : = '' l i s t _ i t e m;
g o to A c o d e _p o i n t e r ;

return: l i s t _p o i n t e r : = p o p _f r om_s t a c k ( ) ;
{ The f o l l ow i n g code d up l i c a t e s the '' n � x t '' o p er a t i on .
l i s t _i t e m : = "" l i s t _p o i n t e r ;
l i s t _p o i n t e r : = l i s t _p o i n t e r + p o i n t e � _l e n g t h ;
c o d e _p o i n t e r : = .., l i s t i tem;
g a te ......c o d .e _p o i n t e r ;

Listing 3 :
Description of a token-threaded code interpreter in a
The world's most popular microcomputer, with 1 6K of
Pascal-like language. See figure 4.
memory and Level I I basic for only $685 . complete with
full 90 day Radio Shack warranty. We accept check,
c an s t t o k e n _l e n g t h = ( l e n g t h o f t o k e n )
money order or phone orders with Visa orMasterCharge. c a l l _c o d e _ l e n g t h = ( length o f " ca l l " c ode s e g men t ) ;
t o k n umber ( n umber of to kens possi b l e ) ; { is 256 f o r an
(Sh ipping costs added to charge orders). =

8
{ 8-b i t t o k e n
Disk drives, printers, var l i s t _p o i n t e r : p o i n ter; { i nterpreted p r o g ram c o unter }
c o d e _p o i n t e r : p o inter; { p o i n t er to mat h i ne c ode }
peripherals, software Shown Is Level I. tab l e : a r r a y [ ! . . t o k n umb e r J of p o i nt e r ; { s u b r o u t i ne ta b l e }
Level II includes
and games . . . you Alphanumeric keypad. t o k en item: s h or t to ken;
label n e x t:-c a l 1 . r e t u r n ;
n a me it, we've got it
(Both Radio Shack & ne x t : t o k en i tem : = A l i s t _p o i n t e r ;
P
l i s t_ o i nter : = l i st_p o i n t e r + t o k e n_l e n g t h ;
other brands). Write ��-- - c o d e _p o i n t e r : = t a b l e [ t o k e n_i t e m J ;
t o k en_i t e m .....,c o d e_p o i n t e r J
or call for our :�

c o d e_p o i n t e r t a b l e [ t o k e n_i t e m ) ;

C &S
: =

complete price list. g oto A c o d e _p o i n t e r ;

call: p u s h_on_!i t a c k ( 1 i s t _p o i n t e r ) J

ELECTRONICS MART
{ The va l u e of t h e c o d e _p o i n t e r was set by the preced ing
{ ' ' n e x t '' o p e r a t i on .
l i s t _p o i n t er : = c o de_p o i n t e r + c a l l _c o d e _ l e n g t h ;
The f o l l ow i n g c ode d u p l i cates the ' ' n e x t '' o p er a t i on .
t o k en_i t e m := A l i s t _p o i n t e r ; ·
l i s t _p o i n t e r ; = l i s t_p o i n t e r + t o k e n _l e n g t h ;
Ltd. c o d e _p o i n t e r : = t a b l e [ t o k e n _i t e m ) ;
goto Ac o d e _p o i n t e r ;

r e t urn : l i s t_p o i n t er : = p o p _fr om_s t a c k ( ) ;

{ T h e f o l l ow i n g c o d e d u p l i c a t � s t h e ' ' n e x t '' o p e r a t i on.
t o k e n_i t e m : = A i i s t _p o i n t e r ;
l i s t _p o i n t e r : = l i s t _p o i n t e r + t o k e n_le n g t h ;
c o d e _p o i n t e r := t a b l e [ t o k e n _i t e m J ;
g oto A c o d e_p o i n t e r ;
3 2 E . Main Streete Mila n M ichiga n 481 60 e (3 1 3) 439-1 400

214 September 1980 © BYTE Publications Inc Circle 1 32 on inquiry card.

listing 4: A simple direct-threaded code interpreter for the listing 5: A simple indirect-threaded code interpreter for the
MC6809 microprocessor. MC6809 microprocessor. In this and listings 6 thru 8, each block
of information in lowercase is a "stack picture"-ie: a diagram
RETURN' PULS Y GET NEW THREAD PTR of what is on the stack at that particular place in the code.
JMP C . Y++J DO "NEXT"

5 -)t h r e a d p tr 1
t h re a d ptr 2
Ma c h l R o u t i n e IL R o u t i n e
NEXT: LEAS -2. S MAKE SPACE
CALL: PSHS Y PSHS X SAVE X
LEAY *+7, PCR STACK OLD THREAD PO INTER
JMP [ , Y++ J ADDR OF FOLLO W I N G IL CODE 5 ->x
JMP C. Y++J space
t h re a d ptr 1
FOB RETURN AOOR OF " R ETURN"
t h re a d ptr 2

LOX ( , Y++ J GET ADDRESS OF ROUTINE

STX 2. S SAVE AS UPCOM I NG PC
systems (which may want to use read-only memory
->x
modules)., this . limitation requires that special "header"
5
r o u t i ne a d d r
and "trailer" code be written to move data values used by thread ptr 1
thread ptr 2
the intermediate language to and from the registers used
by previously written machine-language· code. .
PULS X, PC RECOVER X AND GO !
It is also possible to eliminate the use of processor
resources in an intermediate. language by storing the 5 -> t h r e a d
thread
ptr 1
p tr 2
interpreter's "registers" in memory; this leaves the pro­
cessor free for. use by machine-language code at .the ex­
pense of additional overhead during interpretation. [ This CALL: PSHS y SAVE CURRENT THREAD PTR
LOY , --Y GET PREV I OUS I N D I RECT PTR
overhead consists of having to move these registers be­ LEAY 2. Y NEW THREAD PTR
tween memory and the hardware registers of the host BRA NEXT

processor when you want to manipulate the contents of RETURN: PULS y RECOVER OLD THREAD PTR
the interpreter registers . . . . GW ) The use of absolute loca­ BRA NEXT

tions in memory would itself be a problem, because these

locations can then conflict with locations used by other
software packages. By saving the intermediate-language
registers on the stack, the language may be made inde-
Listing 6:A more complex direct-threaded code interpreter for
the MC6809 microprocessor. Execution of the intermediate­
language subroutine starts at the label ENTRY.
M I C R O ·M IS C E L LANY
5 -)ne x t
t hread p tr 1

,-.J ,� } JiJ
t h re a d p tr 2

RETUR N : LEAS 2. S D I SC A R D "NEXT"

..... -c
P UL S y GET SAVED THREAD PTR
.�: �":.� l;l

$44.95 N1 : BSR N2 PUSH ADDR OF N E X T

5 -> t h r e a d p tr 2

$79.95 $1 2.50 NEX T :

N2 :
BRA
JMP
N1
L Y++ J
SET
GO TO
UP R ETURN TO
ROUT I N E
NEXT

Your computer can control power

Interfaces Printers, synthesizers (120VAC) to your printer, lights, and 5 -> n e x t
keyboards, and JBE A·D D·A Converter olher 120VAC appliances up to 720 t h read p tr 2
& Switches. This Interface has 4 110 watts (6AMPS at 120VAC). Input 3 to 15
ports with handshaking Iagle, 2·6522 VDC, 2·13 MA TT L compatible, Isola·
VIA's and a 74LS74 for timing. Inputs lion 1500V.
and outputs are TTL compatible. 1 -C o d e Rout ine ( start at E N TR Y >
79·282 1 Channel Kit $ 9.95
79-295K Complete Kit $69.95 Assm. $12.50
79·295A Assembled $79.95 79·282 4 Channel Kit $34.95 PSHS X SAVE X

Assm. $44.95 S - :> X

thread ptr 0
space
ne x t
t hread p tr
8088 5-CHIP SYSTEM $29.95 thread p tr 2
8085 3·CH I P SYSTEM $24.95 LOX 6. S GET ADDR OF "NEXT"
STX 4. S MOVE IT
MEMORY BOARD
STY 6. 5 SAVE O L D THREAD P TR
8208 64K DYNAMIC $39.95 s -> x
t h re a d p tr 0
ne x t
y ( 0ld t h re a d p tr l
Analog to Digital, Digital to Analog JOHN BELL ENGINEERING
P.O. Box 338 thread p tr 1
Converter, AtoO conversion time 20us. Dept. 4
DtoA conversion 5us. Uses Include Redwood City, CA 94064
thread p tr 2

Speech and music synthesizing and (415) 367·1 1 37

PULS x. y RECOVER X, NEW THREAD P T R
slow scan TV. Single power supply JMP ( , Y++ J D O S I MP L E " NE X T "
(5V), 8 Bits wide, latched 110, strobe Add 6% sales tax In California and ENTR Y : LEAS 2, 5 MAKE S P A C E
lines.
-
·

$1.00 shipping and handling for orders BSR PUSH NEW THREAD PTR , G O T O PSHS X
79·287K Complete Kit $49.95 less than $20. Add 4% for VISA or M.G. 0: START OF THE IL CODE
79-287A Assembled $69.95

J O H N B E L L E N G I N EE R I N G ADDR OF " R ETUR N "

216 September 1980 © BYfE Publications Inc Circle 1 34 on inquiry card.

 able, to do so. Given machine-language distribution, the
Software can be written to function market is already limited to those users with a particular
properly on widely varying computers processor; it should not also be limited to those users
with a particular computer system.
that use the same microprocessor . Software can be written such that it functions properly
on systems that use different locations for programmable
memory, read-only memory, and input/output (I/0) de­
pendent of particular programmable memory locations. vices, as well as systems that use completely different I/0
Another way to eliminate the use of processor re­ devices. The system-independent read-only memory
sources, as well as maximize throughput, is to use must be written in code that is position independent, and
subroutine-threaded code (STC ) . Subroutine-threaded it must also include features for linking to other similar
code makes use of only the program counter and the sub­ modules. These criteria can be satisfied with machine­
routine return stack, resources already dedicated to the language code (on certain processors) or with a correctly
control of program flow. Thus, the processor resources designed intermediate language . Widest distribution re­
traditionally available to the programmer remain free for quires such properly written code.
use by machine-language code.
Machine-Language Examples of
Distribution of Software Threaded-Code Interpreters
It is possible to conceive of a mass market for software; Here we present assembly-language code for the
such a market would allow high-quality programs to be Motorola MC6809 microprocessor which implements
distributed at low cost. We will assume that such code complete interpreters for direct-threaded code, indirect­
will be distributed in the form of read-only memory threaded code, and token-threaded code. Most of these
modules, so that a purchaser actually receives a physical listings are punctuated by "stack pictures" (typed in
product for his money. Furthermore, the memory needed lowercase) that represent the current state of the stack at
to store the program is included in the purchase price, a various points in the listing; visualization of the stack is
characteristic not obtained with distribution on magnetic often crucial to understanding the interpretive process.
media. Software piracy will be possible for advanced An illustration of subroutine-threaded code (using
hobbyists, but these represent only a small portion of the subroutine jump and return instructions) would be
consumer market. trivial, and thus is not included. However, it should be
To maximize sales, it is necessary that everyone who noted that a position-independent form of subroutine­
has a computer and who wants to use the program be threaded code is available on computers with long rela-

� Produced a n d widely used i n Eng l a nd a n d U .S .A.

CO M P L ET E B U SI N ESS PAC KAG E
INCLU DES EVERYTHING FROM INVENTORY TO SALES SUM MARY
PROMPTS USER, VALIDATES EACH ENTRY, MENU DRIVEN
Approximately 60·100 entries/Inputs require only 2·4 hours weekly and your entire business is under control.
PROG RAMS ARE INTEGRATED· SELECT FU N CTION BY NUMBER·
01 = ENTER NAM ES/ADDRESS, ETC 13 = PRINT CUSTO M ER STATEM ENTS
02 = ENTER/PRINT INVOICES 1 4 = PRINT SUPPLI E R STAT E M ENTS
03 = ENTER PURCHASES 15 = PRINT AGENT STATEMENTS
04 = ENTER AJC RECEIVABLES 16 = PRINT TAX STATEMENTS
05 = ENTER AJC PAYABLES 17 = PRINT WEEK/MONTH SALES
06 = ENTER/UPDATE I N VENTORY 1 8 = PRINT WEEK/MONTH PURCHASES
07 = ENTER/UPDATE ORDERS , 9 = PRINT YEAR AUDIT
08 = ENTER/UPDATE BANKS 20 = PRINT PROFIT/LOSS ACCOUNT
09 = EXAM I N E/MON ITOR SALES LEDGER 21 = U PDATE END MONTH FILES MAI NTENANCE
10 = EXAM I N E/MONITOR PURCHASE LEDGER 22 = PRINT CASH FLOW FORECAST
11 = EXAM I N E/MONITOR ( I N COM PLETE RECORDS) 23 = ENTER/UPDATE PAYROLL (NOT YET AVAILABLE)
12 = EXA M I N E PRODUCT SALES 24 = RETURN TO BASIC
WHICH ONE? (ENTER 1 ·24)
01 SUB. MENU EXAMPLE: 01 EXAMINE: 02
= INSERT: 03
= AMEND: 04= = DELETE
05 PRINT (1 ,2,3): 06
= NUMERIC COMBINATIONS: 07
= SORT =

VERY FLEXIBLE. ADD YOUR OWN FUNCTIONS. EASY TO INTEG RATE.

All programs in BASIC for CP/M. PET. 6800
G. W. COM PUTERS L,.TD, the producers of t h i s beautifu l package i n U.K.

WE EXPORT TO ALL COUNTRIES: CALLERS BY APPOINTMENT ONLY CONTACT TONY WINTER 01 -636-8210
BARCLAYCARD ACCEPTED 89 Bedford Court Mansions BARCLAYCARD ACCEPTED
CBM APPROVED Bedford Avenue CBM APPROVED
London WC1, U.K.
CP/M Ver. 9.00 is one 1 6 K core program CP/M Ver. 9.00 Is one 16 K core program
using random access releasing both drives for using random access releasing both drives for
data storage, and 250 word vocabulary Is data storage, and 250 word vocabulary is
translatable in any foreign language. translatable in any foreign language.

PRICES: Programs 1 ·23 EXC (19,20,22,23) £475 £575 Stock Integrated Option + £100 Bank Integrated Option + £100

218 September 1980 © BYTE Publications Inc Circle 1 36 on inquiry card.

tive branch instructions (eg : the LBSR, long branch-to­ Listing 7:
An improved direct-threaded code interpreter for the
subroutine, and RTS, return-from-subroutine, instruc­ MC6809 microprocessor. This interpreter does not use any of
tions on the MC6809). the microprocessor registers.
Listing 4 illustrates a very simple implementation of a
s -) p t r to new t h re a d
direct-threaded code interpreter. This particular imple­
' addr of " ne x t "
men tation is very fast, but it has the following old t h r ea d p tr
undesirable properties:
C AL L : P SHS D SAVE D
LDD 2, S GET NEW P T R
• it requires a special machine-language return instruc­ STD 4, S THREAD P T R
tion (ie: JMP [ , Y + + ] );
• it reserves the Y register for use by the interpreter; s -)d

• it requires that the interpreter location (the address of space

n e w threa d p tr
RETURN) be known to the compiler, making the old thread p tr
resulting intermediate-language code definitely
position-dependent. P ULS D R E C OVER D
LEAS 2, S DELETE SPACE
NE X T : LEAS -4, S MORE SPACE
In operation, the Y register points to the next address in
a direct-threaded code list; that address, of course, points s -)s p a c e
directly to machine code. Executing the operation JMP space
thread p tr
[, Y + + ] (indirect, autoincrement by 2) causes the
machine to start execution at the address contained in the R ETUR N : P SHS X, D SAVE X, D
list element; simultaneously, the Y register fs updated to
point at the next item In the list of addresses. · s -)d

The single instruction JMP [ , Y + + ] ends each

space
machine-language subroutine. By reserving a processor space
register for use as the current thread pointer, a speed ad­ thread p tr
vantage is obtained; transfer of control using JMP
LDX S, S GET THREAD PTR
[, Y + + ] requires nine machine cycles (on the MC6809),
LDD , X ++ GET NEXT MACHL ADDR
while a JSR-RTS pair requires thirteen. STX S. S STACK THREAD PTR
The situation becomes more complex when control is STD 4, S STACK R O UT I NE ADDR
transferred to a subroutine composed of intermediate- · LEAX NEXT, PCR GET ADDR OF " NE X T "
STX 6, S SAVE A S MACHL R E T U R N
language statements. Machine-language instructions are
included at the beginning of the intermediate-language s -)d
subroutine to perform the call opera tion. The Y register X

may be thought of as the topmost location of the stack of mac h l r o u t ine

addr of "ne xt"
intermediate-language return addresses; its contents are
thread p tr
pushed onto the stack, and Y is loaded with the address
of the start of the intermediate-language subroutine list. P ULS D, X , PC GO TO MACHL R O UT I NE
The last item in an intermediate language list is the
s -)a d d r of " ne x t "
address of the return routine. This recovers an old inter­
thread p tr
mediate-language pointer from the stack and continues
interpretation where it left off when it did a subroutine
call. I -C O D E : J S R C ALL < i n s t l > . . . <RETURN>

listing 5, we show a very simple indirect-threaded

code interpreter. As in the previous example, the inter­
pretation process is fast, but again it has the following
limitations :
Listing 8: Token-indirect token-threaded interpreter for the
MC6809 microprocessor. Because of the use of two levels of
• it must use a position-dependent, machine-language lookup, this interpreter is completely position independent.
return instruction (eg: JMP NEXT);
• it uses the Y register to hold the list pointer; s -> t a b l e a d d r
• it still requires that the compiler generate position­ old ind irect
dependent pointers to the CALL and RETURN t h re a d p tr

routines .
NEX T : LEAS -4 , S MAKE FREE STACK SPACE
P SH S U, X , D SAVE R E G I STERS
Listing 6 is an example of a moderately complex direct­
threaded code interpreter. It is somewhat slower than the s '-) d
simple interpreter in listing 4, but it uses a standard RTS X

instruction to return from machine-language routines. u

space
Thus, the machine-language routines need not contain
space
pointers to the next operation. Still, this advantage is tab l e addr
bought at the expense of additional machine-language i n d i re c t
code in each intermediate-language subroutine. The t h re a d p tr
intermediate-language subroutines themselves do have Listing 8 continued on page 222

220 September 1980 © BYrE Publications Inc

 BUSINESS - PROFESSIONAL - GAME Listing 8 continued:
LDU
SOFTWARE FOR APPLE AND TRS-80 LDX
10, S
1 4, S
GET
GET
TABLE
THREAD
ADDR
PTR

0 H O M E F I N A N C E PAK I : Complete package $49.95 A p ple, TRS-80

LDB I X+ GET I ND I R E C T TOKEN
0 BUDGET: The heart o f a comprehensive home finance system. Allows user to define up to 20 budget
STX 1 4, S SAVE THREAD PTR
items. Actual upense input can be by keyboard or by automatic reading of C H E C K B O O K I I files. Costs are
automatically sorted and compared with budget. B U D G E T produces both monthly actual/budget/variance CLRA
report and a year-to-date by month summary of actual costs. Color graphics display of expenses. . . $24.95
ASLB T W O B YTES P ER TOKEN
0 C H E C K B O O K 11: This extensive program keeps complete records of each check/deposit. check
entry system allows user to set up common check purpose and recipient categories. Upon entry you select R OLA
from this pre-defined menue to minimize keying in a lot of data. Unique names can also be stored lor com­
pleteness. Rapid access to check files. Check register display scrolls for ease of review. 40 column print· LDX D. U TABLE-RELA T I VE INDI RECT PTR
out. Up to 100 checks per month storage. Files accessible by B U D G p program , , . . . . . . . . . . . $19.95
ADDD 4. S NOW AB SOLUTE
0 SAVINGS : Allows user to keep track of deposits/withdrawals for up to 1 0 savings accounts. Cpmplete
records shown via screen or 4 0 column printer. . . . . . . . . $14.95
TFR D, X
0 CREDIT CARD : Keep control of your cards with this program. stores and dis111ays purchases,
payments and service charges. Screen or 40 column printer display. Up to 1 0 separate cards . . . . . . $14.95 LDB ' X+ G E T TOKEN
STX 12, S SAVE I ND I RE C T P T R
0 TH E U N I V E RSAl C OM P U T I N G MAC H I N E : $39.95 Apple, TRS-80
A user programmable computing system structured around a 20 r o w x 20 column table. User defines row CLRA
and column names and equations forming a unique computing machine. Table elements can be
divided, subtracted or added to any other element. User can define repeated functions common to a row or ASLB
column greatly simplifying table setup. Hundreds of unique computing machines can be defined, used, stored
R OL A
and recalled, with or without old data, for later use. Excellent for sales forecasts, engineering design
budgets, inventory lists, income statements, production planning, project cost es1imates-in short for any LDD D. U TABLE-RELAT I VE MACHL ADDR
planning, analysis or reponing problem that can be solved with a table, Unique curser commands allow you
to move to any element, change its value and immediately see the effect on other table values. table ADD 4. S NOW AB SOLUTE
can be printed by machine pages (user-defined 3-5 columns) on a 40 column printer. Transform your com·
puter into a UNIVERSAL COMPUTING MACHINE.
TFR D, X

OCOLOR CALENDAR: H I - R E S color display of your personal calendar. Automatic

entry of repetitive events. Review at a glance important dates, appointments, anniversaries, birth· STX 6, 5 SAVE A S U P C OM I NG P C
days, action dates, etc. over a 5 year period. G raphic calendar marks dates. Printer and screen display a
LEA X N E X T , PCR ADDR O F NEXT
summary report by month of your full text describing each day's action item or event. Ideal for anyone with
a busy calendar . . (Apple Only) , . . . . . . . . . S19.95 STX e, s SAVE FOR MACHL RTS
P UL S D , X , U, PC R EC OVER REGS + GO !
0 B U S I N ESS SO FTWA R E S E R I E S : E ntire package $ 1 99.95 Apple, TRS-80
O MICROACCOUNTANT: T h e ideal system f o r t h e small c_ash business. Based on classic T-accounts and
double-entry bookkeeping, this efficient program records and produces reports on account balances,general
ledger journals, revenue and expenses. Screen or 40 column printer reports. Handles up to 500 joumal
entries per period, up to 100 accounts, Instructions include a short primer in Financial Accounting. S49.95 5 -:> a d d r o f " n e x t "
0 UNIVERSAL BUSIN ESS MA C H I N E : This program is designed to S I M P L I F Y and SAVE TIME lor the tab l e a d d r
serious businessman who must periodically Analyze, Plan and Estimate. The program was created usinu our
Universal Computing Machine and it is programmed to provide the following planning and forecas1ing tools. i n d i re c t
CASH F L O W ANALYSIS P R O F O R M A BALANCE S H E E T S O U R C E ANO USE OF F U N OS t h r e a d p tr
PROFORMA P R O F I T & LOSS SALES F O R ECASTER JOB COST ESTIMATOR
Price, including documentation and a copy of the base program, Universal COillflll ling Machine. . . . . $89.95

01NVOICE: Throw away your pens. Use the E L E C T R O N I C INVOICE facsimile displayed on your CAT. C ALL : PSHS D SAVE D
The program prompts and you fill in the data. Includes 3 address fields (yours, Bill to and Shi11 to). Invoice
No., Account No., Order No., Salesman, Terms, Ship Code, FOB Pt. and Date. U p to 10 items per sheet with
these descriptions: Item No., No. of units, Unit Price, Product Code, Product Oescription, Total Dollar
amount per item and invoice total dollar amount. Generates, at your optiOn, hard copy invoices, shi11ping 5 -> d
memos, mailing labels. audit copies and disc updates to master A/A files. (48K) . . . . . . . . . . 549.95
a d d r of " ne x t "
D BUSINESS C H E C K R E G ISTER: Expanded version of the Checkbook I I program. Handles up to 500 checks tab l e a d d r
per month wittl complete record (48K). . . . . . . . . . . . . . . . . . . . . . . . . . . S29.95
i n d ire c t
0 BUSINESS B U D G E T : As described above and companion program to Business Check Reaister. Handles
500 transactions per month, up to 20 cost categories. Accesses BCR files for actual costs. (48K) . . . . S29.9S
thread p tr

0 E l E C T R I C A L E N G I N E E R I N G S E R I E S : Both programs S 1 59 .95 A p ple LDD 4, 8 GET T A B L E ADDR

0 LOGIC SIMULATOR: SAVE TIME A N D M O N E Y . Simulate your digital logic circuits before you build
STD 2, 8 MOVE IT
them. CMOS, TTL, or whatever, if it's digital logic, this program can handle it. The program is an inter­
active, menu driven, lull-fledged logic capable of simulating the bit-time by hit-time response of a
P ULS D R EC OVER D
logic network to user-specified input patterns. I t will handle up to 1000 gates, NANOS, N O A S , It� ·
verters, F L I P - F L OPS, SHIFT R E G ISTERS. COUNTERS and user-defined MACROS. Up to 40 user-defined, BRA NEXT
random, 01 binary input patterns. Simulation results displayed on CRT or printer. Accepts network des·
criptions from keyboard or from L O G I C D E S I G N E R lor simulation. Specify 1000 gate version (48K re·
qui red) or 500 gate version (32K required) . . . . . . . . . . S89.95
R ETUR N : P SH S D SAVE D
0LOGIC D E S I G N E R : Interactive H I-R E S Graphics program for designing di!)ital lngic systems. A menu
driven series of keyboard commands allows you to draw directly on the screen up to 15 different gate types,
including 10 gate shape patterns supplied with the program and 5 reserved for user specification. Standard 5 -> d
patterns supplied are NAND, N O R , INVERTER, EX-OR, T-FLOP, J K-F L O P. 0 -FLOP, RS·F L O P, 4 Bit
C O U N T E R and N-BIT S H I F T R E G ISTER. User interconnects gates just as you would normally draw using
a d d r o f " ne x t "
line graphics commands. Network descriptions for L O G I C SIMULATOR generated simultaneously with the tab l e a d d r
CRT being drawn. Drawing is done in pages of up to 20 gates. Up to 50 pages ( 1 0 per disc) can be
drawn, saved and recalled. Specify 1000 gate (48K) o r 500 gate (32K) system . . . . . . . . . . . . . . ·$89.95 o l d i n d i re c t
t h read p t r 1
0 MAT H E M A T I CS S E R I E S : C o m p lete Package $49.95 A1111le only
t h r e a d p tr 2
0 N U M E R I C A L ANALYSIS :HI-RES 2-0imensional p l o t of a n y function. Automatic scaling. At your OJJtion,
the program will plot the function, plot the INTEGRAL, plot the D E R IVATIVE, determine the ROOTS,
find the MAXIMA and MINIMA and list the I N T E G R A L V A L U E. For 16K . . . . . $19.95
LDD 4. S G E T T A B L E ADDR
0 MATAIX: A general purpose, menu driven program for the INVERSE and DETERMINANT of STD 6, S MOVE IT
any matrix, as well as the S O L U T I O N to any set of SIMULTANEOUS L I N E A R EQUATIONS. Disk 1/0 lor
data save. Specify 55 eqn. set (48K) or 35 eqn. (32K) . . . , S19.95 LDD Q, S R EC OVER D
0 3-0 S U R F A C E PLOTTER : Explore the E L E G A N C E and BEAUTY of MATHEMATICS by creating H I-R E S LEAS 6 , S D I SC A R D JUNK
PLOTS surfaces from any 3-variable equation. Disc save and recall routines for plots. Menu
BRA NEXT
driven to vary surface parameters. Demos include BLACK H O L E gravitational curvature equations . . 51 9.95

0 A CT I O N A D V E NT U R E G A M E S SE R I ES : E ntire series $29.95 Apple o n ly

0 REO BARON: Can you outlly the R E O BARON? This fast action game simulates a machine-gun D O G ·
F I G H T between your W O R L D WAR I BI·PLANE and the baron's. Y:lu can LOOP, DIVE, BANK or CLIMB pointers to the return operation, of course (making the
in any one of 8 directions - and so can the BARON. i n H I-R E S graphics . . . . . . . S14.95
code position-dependent), and the interpreter reserves the
0 BATTLE O F MIDWAY: You are in command of the U.S.S. H O R N ETS' D IVE -BOMBER squadron. Your
targets are the Aircraft carriers, Akagi, Soryu and Kaga. You must fly your way through ZEROS and AA Y register for its own use .
F I R E to make y o u r D IV E-BOMB run. In H I - R E S graphics . . . . . . S14.95
Listing 7 illustrates a direct-threaded code interpreter
O s uB ATTACK : It's April, 1 943. The enemy convoy is headed for the C O R A L SEA. Your sub, the
MORAY, has just the C A R R I E R S and BATTLESH IPS. Easy pickings. But watch out lor the D E· that does not reserve any processor registers; this inter­
STAOVEAS - they're fast and deadly. In H I - R E S graphics . . . 514.95
preter also allows the return from machine-language
0 FREE CATALOG - All programs are supplied in disc and run on Ap1lle I I w/Oisc & A p 1Jiesolt ROM Card &
TRS·BO level I I and require 32K RAM unless otherwise noted. Detailed instructions inclmled. Orders routines by means of a standard RTS instruction. The ab­
shipped within 3 days. Card users include card number. Add S 1 . 5 0 postage and handling with each order.

- California residents add 6Yt% sales taK. Make checks payable to: solute locations of the interpreter call and return routines
-
VISA
SPECTRUM SOFTWARE must be included in each direct-threaded code sub­
O E A L E R I N Q U I R I ES P.O. B O X 20B4 · 142 CARL OW, SUNNYVALE, CA 94087 routine; this usually precludes the distribution of such
INVITED FOR P H O N E O R D E R S - 408-738-43B7
subroutines in read-only memory.

222 September 1980 © BYTE Publications Inc Circle 138 on inqu iry card.
 Type of Threaded Code M C6809 M a c h i n e Ratio of C y c l es · R e l ative S ize of Can t h i s Code
C y c l es Used Used Resu l t i n g Be M arketed to
I ntermed i a t e- All Users of
Language a G iven
Code M i croprocessor?

Subroutine-threaded code 91 1 .0 3 no

Relative subroutine-threaded 98 1.1 3 yes

code

Si mple di rect-threaded 93 1.1 2 no

code (listing 4)

Simple indi rect-threaded 371 4.1 2 no

code (as in listing 5)

Moderately complex d i rect- 228 2.5 2 no

th readed code (as in listing 6)

Improved di rect-threaded 552 6.1 2 no

code (as in listing 7)

Token-threaded code (as 1 083 1 1 .9 yes

in listing 8)

Table 1: Comparison of threaded-code techniques. Notice that only two forms of threaded code, the relative subroutine-threaded
code and the token-indirect token-threaded code are sufficiently system-independent to be used for mass distribution to (poten-
tially) all users of a given microprocessor. ·
·
· ·

A possible alternative would be to modify the direct­ intermediate-language code unsuitable for distribution in

relative pointers_ Then· by including code for call and

threaded code interpreter in listing 7 to use strictly self­ read-only memory.
However, it is possible to build a token-thread inter­
return in each read-only memory device, a form of preter that has a completely position-independent
distributable direct-threaded code might be obtained_ intermediate-language representation . Listing 8 shows
However, because the read-only memory stili contains one implementation that achieves these goals. Notice the
machine-dependent code, the use of direct-threaded code increased complexity and overhead when compared to
in a read-only memory environment offers little advan-
·
our original direct-threaded code interpreter.
tage_ This token-thread interpreter produces intermediate­
The improved direct-threaded code interpreter allows language code that is more compact than that produced
the use of most previously coded machine-language by previously mentioned interpreters. The advantage of a
modules and allows "these routines to pass parameters compact representation need not affect execution speed
the processor registers. Routines cannot pass severely; remember that the overall efficiency of any in­
parameters on the hardware stack (which is used to main­ terpretation scheme (including · the hardware interpreta­
tain the state of the interpreter), but could easily use the tion of op codes) depends more upon the work actually
user stack of the MC6809 microprocessor for parameter accomplished than the time spent in the interpretation
·

transfer_ process· itself.

A similarly improved interpreter could be built for This particular implementation is essentially a token­
indirect-threaded code, but the position-independence indirect token-thread interpreter. Two levels of token
problem is inherent in this intermediate language as well. lookup are involved so that neither machine-language

to the call routine, thus making the resulting

Each indirect-threaded subroutine must include a pointer nor absolute addresses need be included as part of the
intermediate-language subroutine. Of course, perhaps

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224 September 1980 © BYTE Publications Inc Circle 1 40 on inquiry card.

other, more advantageous forms of token-threaded code achieved on the PDP-11 (which uses a 16-bit JSR op code)
interpreters are possible. However, we have shown that is only a 33 % code reduction on most microcomputers,
there is no longer a question whether position­ which have 8-bit JSR op codes . (The LBSR instruction
independent threaded code is possible; now the question can be used in the case of the MC6809 . ) And if the
is : "at what cost?" motivation for threaded code is reduction of the
intermediate-language code size, token-threaded code
The Cost of Implementation implementations can improve the storage efficiency by

intermediate-language implementation include reduced

The claims made for threaded-code techniques in an another 50 % .
The two traditional forms of threaded code (direct and
program storage · and high speed of execution. Unfor­ indirect) are optimized for the environment of a par­
tunately, these claims are justified only in certain limited ticular computer architecture that is represented by the
contexts . The original implementations of threaded code, PDP-11 (and also reflected in the MC6809). Consequent­
which occurred on the Digital Equipment Corpora­ ly, many microcomputer threaded-code implementations
tion PDP-11, made use of the instruction JMP @ (Rn) + ; have provided neither maximum code efficiency nor
this instruction jumps through a memory pointer while maximum speed and have devoured virtually all of the
retaining the location of next in a register. This is machine-level microprocessor resources . Comparisons of
equivalent to the MC6809 instruction JMP L r + + ] . the four types of threaded code demonstrate that it is
The instruction JMP @ (Rn) + does not save a return unlikely that the speed and code-efficiency maxima will
address on a memory stack and thus is faster than a JSR ever coincide.
instruction. In the environment of a single intermediate­ The main factor affecting code compaction is the use of
language program that calls only machine-language sub­ subroutines instead of in-line code; but the use of
routines, stacking and unstacking of the return address subroutines inherently increases interpretation overhead.
need not occur. Of course, when intermediate-language Since all methods of threaded-code implementation allow
programs call intermediate-language subroutines, such the use of subroutines, effects due to the use of
stacking must occur in a process that will take longer subroutines can be disregarded and the efficiency of the
than a normal JSR. Thus, for maximum speed, the implementation methods can be compared directly .
threaded-code intermediate-language program should Table 1 shows this comparison with values from the
not call intermediate-language subroutines. machine-language routines developed earlier (based on
On the other hand, the instruction JMP @ (Rn) + does six next operations for each call and return operation).
eliminate the in-line 16-bit JSR op code for a 50 % code
reduction (on the PDP-11). But the 50 % code reduction Conclusions
Languages that have been historically associated with

.
threaded code will probably continue to use these tech­

Computers
niques when implemented on microcomputers. New

:.;,
implementations should take advantage of the inter­

� Gamblln1
• ..

. ' .tJ-,...�
- pretive nature of threaded code to provide extensive
-! debugging facilities. However, there is no excuse for the

,- . �
Ma1aalne ·
threaded-code implementor to prohibit the use of pre­

�
·.

viously coded machine-language modules by eliminating

PRESENTS: parameter passage through microprocessor registers.
P R O BAB I L I TY Either the interpreter can be designed to keep these
HAN D I CAP P I N G registers free, or special routines· must be written by the
D EV I C E I implementor to save and restore these registers when
A 1 6 K BASIC PROGRAM FOR: using library routines stored in read-only memory .
H O R S E R AC E H AN D I CAP P I N G ! Similarly, the motivation for distributing software in
This amazing program was written by a professional software consultant to TAW Space an open market (to many different users with many dif­
Systems and is being introducod by the publishers of Computers and Gambling Prowcts
Magazine. "PHI}. 1 " is a large complex basic program requiring a full 1 6 K. � is carefully human
ferent systems) leads directly to the requirement for posi­
factored for easy use. PHD- 1 is a comprehensive horse racing system for spotting overlays in tion independence . While the MC6809 directly supports
thoroughbred sprint races (less than 1 mile). You simply s� down w�h your computer end the
Racing Furm the night before the raco and answer 5 or 6 questions about each horse's past position-independent code at the machine-language level,
performance. Your computer then accurately predicts the win probability and odds�ine for each it is also possible to devise threaded-code intermediate
horse allowing you to spot. overlaid horses while et the track. The users manual contains a
complete explanation of overlay betting. languages that are position independent. But any inter­

(45C
Statistics for thousands of horses were used to davelop this handicapping system. The
appendix of the manual contains a detailed tab run of a 100 consecutive race system workout
mediate language or interpreter that requires particular
showing an amazing 45% positive return for each S 1 .00 wagered). A graph is absolute storage locations is so obnoxious as to be un­
also included showing PHD- 1 's close fit to the 1deal predicted probabil� vs. actual win
percentage curve.
worthy of discussion in polite programming society.
This program features: D Win probability end odds for each horse D Verification Absolute-address storage requirements are simply unac­
display of each horse's prior to en!Ty for easy error correction D Bubble� or!
routine for final display Fecil�y for line printer output D Cassette ARCHIVE routine to ceptable in code written for mass distribution.
store PHD- 1 's output for later analysis D Complete users manual.
The user's manual may be ordered separately for your perusal for $7.95 and will be cred�ed
Within these constraints, the various forms of threaded
if you purchase PHD-1 . code offer different trade-offs of speed and code effi­
Order now to get on our list and receive back issues FREEl
ciency . Because these forms are logically equivalent, a
PH D-1 User's Manual and 1 6 K Cassette for: Apple I I
Applesoft Challenger ( Specify Type), TRS-BOt Lave I l l . . . . $29.95 single compiler could be used tb generate any of them at
Ca. res. edd 6% the user's choice. Thus, without changing the source pro­
Make checks pa yable to: J O E CO M P UTER
2 27 1 3 Ventura Blvd., Suite F, Woodland Hills, C A 9 1 364 gram, a threaded-code technique could be selected that
•BE A WINNER: Get on the Computers and Gambling Prowcts M111Jazine mailing list fnr $3.00 would give the desired trade-off between speed and code
and receiw available back issues.
t TRS-80 is a registered trademark of Tandy Corpora tion.
efficiency for a particular situation.
In the end, threaded-code implementation techniques

226 September 1980 © BYTE Publications Inc C i rcle 1 43 on inquiry card.

are neither particularly compact nor are they particularly
fast. Continued development of direct-threaded code

Th e 2nd
structures could result in a language representation that
would look more like Pascal p-code than threaded code.

Gen eration . . .
Threaded code does offer a conceptually simple and
general control-transfer technique that displays a clear
boundary be tween interpreta tion and language .

It's all that it's

However, threaded code is probably not an optimal
representation for any particular language, including

Cracked up to be.
FORTH . •

B i b l iography
1) Bartholdi, P, Stepwise Development and Debuging (sic) Using a
Small Well Structured Interactive Language for Data Acquisition and
Instrument Control. Copy received from the author. (Author's ad­
dress: Observatoire De Geneve, CH-1 290-Sauverny, Switzerland.)
2) Bel l , James R, "Threaded Code," Communications of the ACM,
volume 1 6, number 6, June 1 973, pages 370 t h ru 372.
3) Dewar, Robert K, " I ndirect Threaded Code," Communications of
the ACM, volume 1 8, number 6, June 1 975, pages 330 thru 331 .
4) Dewar, Robert K and A P McCann, " MACRO SPITBOL-A
SNOBOL4 Compiler," Software Practice and Experience, volume 7 ,
number 1 , 1 977, pages 95 thru 1 1 3.
5) fig-FORTH Installation Manual, FORTH I nterest Group, San Carlos
CA, May 1 979.
6) FORTH Dimensions, volume 1 , numbers 1 to 4, FORTH I nterest
Group, San Carlos CA.
7) Gaebler, Robert F, " Make it Natura l , " Electronics, volume 52,
number 1 4, July 5, 1 979, page 6.
8) Grappel, Robert D, "ST R U BAL vs FORT H , " Dr Dobb's Journal,
' M EAS U REM ENT
i n co rporated
volume 3, number 8, September 1 978, page 28.
9) Brinch Hansen, Per and C Heyden, " M icrocomputer Comparison," systems &.. controls
Software Practice and Experience, volume 9, number 3, 1 979, pages
2 1 1 thru 2 1 7 .
1 0) James, John S , " FORTH Dump Programs, " D r Dobb's Journal,
volume 3, number 28, September 1 978, pages 26 thru 27.
1 1 ) James, John, " FORTH for M i c rocomputers , " Dr Dobb's Journal,

CP/M® USERSf
volume 3, number 25, May 1 978, pages 26 t h ru 27.
1 2) Main, Richard B, " FORTH vs Assembly," Dr Dobb's Journal,
volume 4, number 3 1 , January 1 979, pages 45 thru 47.
1 3) Meinzer, Karl, " I PS, An U northodox H igh Level Language,"
January 1 979 BYTE, volume 4, number 1 , pages 1 46 thru 1 59.
1 4) MicroFORTH Primer. FORTH Inc, Hermosa Beach CA, December
1 976. The ED-80 TEXT EDITOR
1 5) Moore, Charles H, " FORTH : A New Way to Program a Mini­

• $ 5 0 , 0 0 0 i n Deve l o p m e nt Costs -
Computer," Astronomical Astrophysics Supplement, volume 1 5,
1 974, pages 497 thru 5 1 1 .
1 6) Moore, Charles H , and Elizabeth D Rather, "The Use of FORTH in
You rs for O n ly $ 9 9 !
• For a l l C P/ M , C ro m e mco, TRS- 80
Process Contro l , " Proceedings of the International Mini-Micro Com­
puter Conference, Geneva, March 26, 1977.
1 7) Oliver, John P, "Astronomy Application for PET FORTH ," Dr
Dobb 's Journal, volume 3, number 30, November and December M od I I , a n d N orth Sta r Syste ms.
• Fu l l Screen Text Ed itor w/Scro l l i ng.
1 978, page 46.
1 8) Phillips, J B, M F Bu rke, and G S Wilson, "Th readed Code for

• For a l l C RT a nd Vi d eo M o n itors.
Laboratory Compute rs," Software-Practice and Experience,
volume 8, 1 978, pages 257 thru 263.

• Featu res Fou nd o n ly on I B M , CDC,

1 9) Rather, Elizabeth D , and Charles H Moore, "The FORTH Ap­
proach to Operating Systems," ACM ' 76 Proceedings, October 1 976,
pages 233 thru 240.
20) Rawson, Edward B , " Let it Be," Electronics, February 14 1 980, U N I VAC a nd D E C Syste ms.
• Forw a rd o r Backward Locate a n d
volume 52, number 4, page 8.
2 1 ) Ritter, Terry F, and Joel Boney, "A Microprocessor for the
Revolution: The 6809-Part 1 : Design Philosophy," January 1 979 C h a nge Com ma n ds.
• F i e l d P rove n - M ore tha n 2 Yea rs.
BYTE, volume 4, number 1 , pages 14 thru 42; " Part 2: Instruction Set

$9900
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4, number 2, pages 32 t h ru 42; " Part 3: Final Thoughts," March 1 979

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BYTE, volume 4, number 3, pages 46 thru 52.

Value
22) Roichel, Ancelme, "SAM76-FORTH-STRU BAL," Dr Dobb's Jour­
nal, volume 3, number 30, November and December 1 978, pages 44 -

Software Development & Tra i ning, I nc.

thru 45.
23) Sachs, Joh n , STOIC (Stack Oriented Interactive Compiler), M IT
and Harvard Biomedical Engineering Center, Cambridge MA, 1 977.
Post Office Box 45 1 1 , Dept. B
24) Sirag, David J, " DTC Versus lTC for FORTH on the PDP-1 1 ,"
FORTH Dimensions, volume 1 , number 3, June and July 1 978, pages H u n ts v i l l e , Ala ba m a 3 5802
VISA or MC
25 thru 29.

Circle 1 44 on inquiry card. September 1980 © BYTE Publications Inc 227