Post Codes Post Codes
InsydeH2O
These tables describe the POST codes and descriptions during the POST.
Post Code Range
Phase POST Code Range
SEC 0x01 - 0x0F
PEI 0x70 - 0x9F
DXE 0x40 - 0x6F
BDS 0x10 - 0x3F
SMM 0xA0 - 0xBF
S3 0xC0 - 0xCF
ASL 0x51 – 0x55
0xE1 – 0xE4
PostBDS 0xF9 – 0xFE
InsydeH2ODDT™ 0xD0 – 0xD7
Reserve
OEM Reserve 0xE8 – 0xEB
Reserved 0xD8 – 0xE0
0xE5 – 0xE7
0xEC – 0xF8
SEC Phase POST Code Table
Functionality Name (Include\ Post
Phase Description
PostCode.h) Code
SEC_SYSTEM_POWER_ON SEC 1 CPU power on and switch to
Protected mode
SEC_BEFORE_MICROCODE_PATCH SEC 2 Patching CPU microcode
SEC_AFTER_MICROCODE_PATCH SEC 3 Setup Cache as RAM
SEC_ACCESS_CSR SEC 4 PCIE MMIO Base Address initial
SEC_GENERIC_MSRINIT SEC 5 CPU Generic MSR initialization
SEC_CPU_SPEEDCFG SEC 6 Setup CPU speed
SEC_SETUP_CAR_OK SEC 7 Cache as RAM test
SEC_FORCE_MAX_RATIO SEC 8 Tune CPU frequency ratio to
maximum level
SEC_GO_TO_SECSTARTUP SEC 9 Setup BIOS ROM cache
SEC_GO_TO_PEICORE SEC 0A Enter Boot Firmware Volume
NOTE: The color bar items indicate 3rd party related functions that are platorm dependent.
1
PEI Phase POST Code Table:
Functionality Name (Include\ Post
Phase Description
PostCode.h) Code
PEI_SIO_INIT PEI 70 Super I/O Initialization
PEI_CPU_REG_INIT PEI 71 CPU Early Initialization
PEI_CPU_AP_INIT PEI 72 Multi-processor Early Initial
PEI_CPU_HT_RESET PEI 73 HyperTransport Initialization
PEI_PCIE_MMIO_INIT PEI 74 PCIE MMIO BAR Initialization
PEI_NB_REG_INIT PEI 75 North Bridge Early Initialization
PEI_SB_REG_INIT PEI 76 South Bridge Early Initialization
PEI_PCIE_TRAINING PEI 77 PCIE Training
PEI_TPM_INIT PEI 78 TPM Initialization
PEI_SMBUS_INIT PEI 79 SMBUS Early Initialization
PEI_PROGRAM_CLOCK_GEN PEI 7A Clock Generator Initialization
PEI_IGD_EARLY_INITIAL PEI 7B Internal Graphic device early
Initialization
PEI_HECI_INIT PEI 7C HECI Initialization
PEI_WATCHDOG_INIT PEI 7D Watchdog timer Initialization
PEI_MEMORY_INIT PEI 7E Memory Initial for Normal boot.
PEI_MEMORY_INIT_FOR_CRISIS PEI 7F Memory Initial for Crisis Recovery
PEI_MEMORY_INSTALL PEI 80 Simple Memory test
PEI_TXTPEI PEI 81 TXT function early Initialization
PEI_SWITCH_STACK PEI 82 Start to use Memory
PEI_MEMORY_CALLBACK PEI 83 Set cache for physical memory
PEI_ENTER_RECOVERY_MODE PEI 84 Recovery device Initialization
PEI_RECOVERY_MEDIA_FOUND PEI 85 Found Recovery image
PEI_RECOVERY_MEDIA_NOT_FOUND PEI 86 Recovery image not found
PEI_RECOVERY_LOAD_FILE_DONE PEI 87 Load Recovery Image completed
PEI_RECOVERY_START_FLASH PEI 88 Start Flash BIOS with Recovery
image
PEI_ENTER_DXEIPL PEI 89 Loading BIOS image to RAM
PEI_FINDING_DXE_CORE PEI 8A Loading DXE core
PEI_GO_TO_DXE_CORE PEI 8B Enter DXE core
NOTE: The color bar items indicate 3rd party related functions that are platorm dependent.
2
DXE Phase POST Code Table:
Functionality Name (Include\
Phase PostCode Description
PostCode.h)
DXE_TCGDXE DXE 40 TPM initial in DXE
DXE_SB_SPI_INIT DXE 41 South bridge SPI initialization
DXE_CF9_RESET DXE 42 Setup Reset service
DXE_SB_SERIAL_GPIO_INIT DXE 43 South bridge Serial GPIO
initialization
DXE_SMMACCESS DXE 44 Setup SMM ACCE SS service
DXE_NB_INIT DXE 45 North bridge Middle initialization
DXE_SIO_INIT DXE 46 Super I/O DXE initialization
DXE_LEGACY_REGION DXE 47 Setup Legacy Region service
DXE_SB_INIT DXE 48 South Bridge Middle initialization
DXE_IDENTIFY_FLASH_DEVICE DXE 49 Identify Flash device
DXE_FTW_INIT DXE 4A Fault Tolerant Write verification
DXE_VARIABLE_INIT DXE 4B Variable Service initialization
DXE_VARIABLE_INIT_FAIL DXE 4C Fail to initial Variable Service
DXE_MTC_INIT DXE 4D MTC Initial
DXE_CPU_INIT DXE 4E CPU Middle Initialization
DXE_MP_CPU_INIT DXE 4F Multi-processor
MiddleInitialization
DXE_SMBUS_INIT DXE 50 SMBUS Driver Initialization
DXE_SMART_TIMER_INIT DXE 51 8259 Initialization
DXE_PCRTC_INIT DXE 52 RTC Initialization
DXE_SATA_INIT DXE 53 SATA Controller earlyInitialization
DXE_SMM_CONTROLER_INIT DXE 54 Setup SMM Control service
DXE_LEGACY_INTERRUPT DXE 55 Setup Legacy Interrupt service
DXE_RELOCATE_SMBASE DXE 56 Relocate SMM BASE
DXE_FIRST_SMI DXE 57 SMI test
DXE_VTD_INIT DXE 58 VTD Initial
DXE_BEFORE_CSM16_INIT DXE 59 Legacy BIOS Initialization
DXE_AFTER_CSM16_INIT DXE 5A Legacy interrupt function
Initialization
DXE_LOAD_ACPI_TABLE DXE 5B ACPI Table Initialization
DXE_SB_DISPATCH DXE 5C Setup SB SMM Dispatcher
service
DXE_SB_IOTRAP_INIT DXE 5D Setup SB IOTRAP Service
DXE_SUBCLASS_DRIVER DXE 5E Build AMT Table
DXE_PPM_INIT DXE 5F PPM Initialization
DXE_HECIDRV_INIT DXE 60 HECIDRV Initialization
NOTE: The color bar items indicate 3rd party related functions that are platorm dependent.
3
BDS Phase POST Code Table:
Functionality Name (Include\ Post
Phase Description
PostCode.h) Code
BDS_ENTER_BDS BDS 10 Enter BDS entry
BDS_INSTALL_HOTKEY BDS 11 Install Hotkey service
BDS_ASF_INIT BDS 12 ASF Initialization
BDS_PCI_ENUMERATION_START BDS 13 PCI enumeration
BDS_BEFORE_PCIIO_INSTALL BDS 14 PCI resource assign complete
BDS_PCI_ENUMERATION_END BDS 15 PCI enumeration complete
BDS_CONNECT_CONSOLE_IN BDS 16 Keyboard Controller, Keyboard
and Mouse initialization
BDS_CONNECT_CONSOLE_OUT BDS 17 Video device initialization
BDS_CONNECT_STD_ERR BDS 18 Error report device initialization
BDS_CONNECT_USB_HC BDS 19 USB host controller initialization
BDS_CONNECT_USB_BUS BDS 1A USB BUS driver initialization
BDS_CONNECT_USB_DEVICE BDS 1B USB device driver initialization
BDS_NO_CONSOLE_ACTION BDS 1C Console device initial fail
BDS_DISPLAY_LOGO_SYSTEM_INFO BDS 1D Display logo or system information
BDS_START_IDE_CONTROLLER BDS 1E IDE controller initialization
BDS_START_SATA_CONTROLLER BDS 1F SATA controller initialization
BDS_START_ISA_ACPI_CONTROLLER BDS 20 SIO controller initialization
BDS_START_ISA_BUS BDS 21 ISA BUS driver initialization
BDS_START_ISA_FDD BDS 22 Floppy device initialization
BDS_START_ISA_SEIRAL BDS 23 Serial device initialization
BDS_START_IDE_BUS BDS 24 IDE device initialization
BDS_START_AHCI_BUS BDS 25 AHCI device initialization
BDS_CONNECT_LEGACY_ROM BDS 26 Dispatch option ROMs
BDS_ENUMERATE_ALL_BOOT_OPTION BDS 27 Get boot device information
BDS_END_OF_BOOT_SELECTION BDS 28 End of boot selection
BDS_ENTER_SETUP BDS 29 Enter Setup Menu
BDS_ENTER_BOOT_MANAGER BDS 2A Enter Boot manager
BDS_BOOT_DEVICE_SELECT BDS 2B Try to boot system to OS
BDS_EFI64_SHADOW_ALL_LEGACY_RO BDS 2C Shadow Misc Option ROM
M
BDS_ACPI_S3SAVE BDS 2D Save S3 resume required data in
RAM
BDS_READY_TO_BOOT_EVENT BDS 2E Last Chipset initial before boot to
OS
BDS_GO_LEGACY_BOOT BDS 2F Start to boot Legacy OS
BDS_GO_UEFI_BOOT BDS 30 Start to boot UEFI OS
BDS_LEGACY16_PREPARE_TO_BOOT BDS 31 Prepare to Boot to Legacy OS
BDS_EXIT_BOOT_SERVICES BDS 32 Send END of POST Message to
ME via HECI
BDS_LEGACY_BOOT_EVENT BDS 33 Last Chipset initial before boot to
Legacy OS.
BDS_ENTER_LEGACY_16_BOOT BDS 34 Ready to Boot Legacy OS.
4
Functionality Name (Include\ Post
Phase Description
PostCode.h) Code
BDS_RECOVERY_START_FLASH BDS 35 Fast Recovery Start Flash.
NOTE: The color bar items indicate 3rd party related functions that are platorm dependent.
PostBDS POST Code Table
Functionality Name (Include\ Post
Phase Description
PostCode.h) Code
POST_BDS_NO_BOOT_DEVICE POST_BDS F9 No Boot Device
POST_BDS_START_IMAGE POST_BDS FB UEFI Boot Start Image
POST_BDS_ENTER_INT19 POST_BDS FD Legacy 16 boot entry
POST_BDS_JUMP_BOOT_SECTOR POST_BDS FE Try to Boot with INT 19
S3 Functions POST Code Table
Post
Functionality Name (Include\ PostCode.h) Phase Description
Code
POST_BDS_NO_BOOT_DEVICE POST_BDS F9 No Boot Device
POST_BDS_START_IMAGE POST_BDS FB UEFI Boot Start Image
POST_BDS_ENTER_INT19 POST_BDS FD Legacy 16 boot entry
POST_BDS_JUMP_BOOT_SECTOR POST_BDS FE Try to Boot with INT 19
ACPI Functions POST Code Table
Post
Functionality Name (Include\ PostCode.h) Phase Description
Code
ASL_ENTER_S1 ASL 51 Prepare to enter S1
ASL_ENTER_S3 ASL 53 Prepare to enter S3
ASL_ENTER_S4 ASL 54 Prepare to enter S4
ASL_ENTER_S5 ASL 55 Prepare to enter S5
ASL_WAKEUP_S1 ASL E1 System wakeup from S1
ASL_WAKEUP_S3 ASL E3 System wakeup from S3
ASL_WAKEUP_S4 ASL E4 System wakeup from S4
SMM Functions POST Code Table
Functionality Name (Include\ Post
Phase Description
PostCode.h) Code
SMM_IDENTIFY_FLASH_DEVICE SMM 0xA0 Identify Flash device in SMM
SMM_SMM_PLATFORM_INIT SMM 0xA2 SMM service initial
SMM_ACPI_ENABLE_START SMM 0xA6 OS call ACPI enable function
SMM_ACPI_ENABLE_END SMM 0xA7 ACPI enable function complete
SMM_S1_SLEEP_CALLBACK SMM 0xA1 Enter S1
SMM_S3_SLEEP_CALLBACK SMM 0xA3 Enter S3
SMM_S4_SLEEP_CALLBACK SMM 0xA4 Enter S4
SMM_S5_SLEEP_CALLBACK SMM 0xA5 Enter S5
5
Functionality Name (Include\ Post
Phase Description
PostCode.h) Code
SMM_ACPI_DISABLE_START SMM 0xA8 OS call ACPI disable function
SMM_ACPI_DISABLE_END SMM 0xA9 ACPI disable function complete
InsydeH2ODDT Debugger POST Code Table
Functionality Name
PostCode Description
(Include\ PostCode.h)
Used by Insyde debugger 0x0D Waiting for device connect
Used by Insyde debugger 0xD0 Waiting for device connect
Used by Insyde debugger 0xD1 InsydeH2ODDT Ready
Used by Insyde debugger 0xD2 EHCI not found
Used by Insyde debugger 0xD3 Debug port connect low speed device
Used by Insyde debugger 0xD4 DDT Cable become low speed device
Used by Insyde debugger 0xD5 DDT Cable Transmission Error (Get descriptor fail)
Used by Insyde debugger 0xD6 DDT Cable Transmission Error (Set Debug mode fail)
Used by Insyde debugger 0xD7 DDT Cable Transmission Error (Set address fail)
