8085 Microprocessor Architecture

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8085 Microprocessor Architecture
Accumulator
Arithmetic and logic Unit
General purpose register
Program counter
Stack pointer
Flags
Timing and Control unit
Interrupt control
Serial Input/output control
Address buffer and Address-Data buffer
Address bus and Data bus

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Intel 8085 CPU Block Diagram

ALU

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 Special
Purpose
Registers
Registers

Accumulator (A) (8) Flags (F) (8)

B (8) C (8)
General
Purpose D (8) E (8)
Registers
H (8) L (8)
Program Counter (16) Sixteen
Bit
Stack Pointer (16)
Registers
16 8
Address Data

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 General purpose Registers

Six general purpose 8-bit registers: B, C, D, E, H, L

They can also be combined as register pairs to perform

16-bit operations: BC, DE, HL Data Pointer or

Memory Pointer (M)

Registers are programmable (Data load, Move etc.)

B (8) C (8)
16
High order Low order
register register

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 Special purpose Registers
1.Accumulator (A)
 Single 8-bit register that is part of the ALU
 Used in
Arithmetic/logic operations
Load
store
As well as I/O operation

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 Special purpose Registers
Flag
S Z AC P CY

 S = After the execution of an arithmetic operation, if bit 7 of the

result is 1, then sign flag is set. ( 1 Negative 0 Positive)
 Z = Bit is set if ALU operation results a zero in the Accumulator
 AC = Bit is set, when a carry is generated by bit 3 & passed on bit 4.
P = Parity bit is set when the result has even number of 1s.
 CY = carry is set when result generates a carry. Also a borrow flag.

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Example : ADD B

1 0 1 0 1 0 0 0
(A)A8H
1 1 1 0 1 1 0 1
(B)EDH

1 1 0 0 1 0 1 0 1
CY  95H (A)

S Z AC P CY

1 0 1 1 1

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Program counter & Stack Pointer
PC acts as a pointer to the NEXT instruction to be
executed

PC automatically increments to point to the next

memory during the execution of the present instruction.

( In Jump or CALL , PC changes to address of subprogram)

Stack is reserved area of the memory

( Temporary information storage - LIFO algorithm)

After every stack operation SP points to next available

location of the stack (Recent Entry)
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 ALU (Arithmetic & Logic Unit)
 To perform arithmetic operations like
Addition & Subtraction

 To perform logical operations like

AND
OR
NOT (Complement)
XOR

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Instruction Register & Decoder
The processor first fetches the opcode of instruction
from memory & stores opcode in the instructions
registers , it is then sent to instruction decoder

The Instruction decoder decodes it & accordingly

gives for further processing depending on nature of
instructions

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 Address buffer & Address/Data buffer
Address Buffer
8 bit unidirectional buffer
The address bits are always sent from the MPU to peripheral
devices, not reverse
Used to drive external High order address bus (A8-A15)

Address Buffer & Address/Data Buffer

8 bit Bidirectional buffer
The data bits are sent from the MPU to peripheral devices, as
well as from the peripheral devices to the MPU
Used to drive multiplexed address/data bus
i.e Low order address bus (A0-A7) & data bus (D0-D7)
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Bus: A shared group of wires used for communicating signals among devices

•Address Bus : The device and the location within the device
that is being accessed
Total 216 = 65,536 (64k) Memory Locations
Address Locations: 0000H– FFFFH
• Data Bus : The data value being communicated
Data Range: 00H – FFH
• Control Bus : Describes the action on the address & data
buses

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 Interrupt Control
When the Microprocessor receives an interrupt
signal, it suspends the currently executing program
and jumps to ( Special Routine or Sub program) an
Interrupt Service Routine (ISR) to respond to the
incoming interrupt
 Five Interrupt inputs & one
Acknowledge signal

INTA

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 Serial I/O Control
It provides two lines SOD & SID for
Serial Communication
1.SOD (Serial Output Data)
used to send Data serially
2.SID (Serial Input Data)
used to Receive Data serially

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 Timing & Control /circuitry
Timing and control unit is a very important
unit as it synchronizes the registers and flow of
data through various registers and other units

Control Signals : READY, RD, WR, ALE

Status Signals : S0, S1, IO/ M
DMA Signals : HOLD, HLDA
RESET Signals : RESET IN, RESET OUT

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Intel 8085 Pin
8085
Configuration

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 Classifications of Pins
8085 has 40 PIN IC
1. POWER SUPPLY & FREQUENCY Signals
2. DATA Bus & ADDRESS Bus
3. CONTROL & STATUS Signals
4. INTERRUPT Signals
5. SERIAL I/O Signals
6. DMA Signals
7. RESET Signals

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8085

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Power Supply & Frequency Signals
• VCC : +5 Power Supply
• Vss : Ground Reference
• X1 and X2 : Determine the Clock Frequency
• CLOCK OUT : Half the crystal or Oscillator
Frequency (Used as a system
clock for other devices)

+5 V 8085

X1 CLK OUT 3 MHz

6 MHz
X2

GND
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 Data Bus & Address Bus
8085 μp consists of 16pins use as Address Bus & 8 pins use as
Data Bus

Divide into 2 part : A8 – A15 (Upper)

: AD0 – AD7 (Lower)

A8 – A15 : Unidirectional, known as „High Order Address‟

AD0 – AD7 : Bidirectional and Dual purpose
(Address and Data are Multiplexed)
A0– A7  Low Order Address
D0 – D7  Data Bus

The method to change from address bus to data bus known

as “Bus Multiplexing” (Adv : Reduces the Number of Pins)
High -order Address Bus( 8 bits)

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Low -order Address Bus(8 bits) & Data Bus(8 bits)

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 Control & Status Signals
ALE : Address Latch Enable
RD & WR : Read & Write Operation
IO/M : I/O Operation or Memory Operation
S0 & S1 : Machine Cycle Progress
READY : Peripheral is ready or not for Data
transfer

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8085

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ALE used to Demultiplex Address/Data bus

ALE –Active high output used to latch the

lower 8 address bits A0 – A7

A8-A15

ALE

Latch
8085 AD7-AD0 A0- A7

D7- D0

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 Control & Status Signals
RD (Active low) To indicate that the I/O or memory
selected is to be read and data are available on the bus

WR (Active low ) This is to indicate that the data

available on the bus are to be written to memory or I/O

IO/M  To differentiate I/O or memory operations

‘0’ - indicates a memory operation
‘1’-indicates an I/O operation

S0 & S1  Status signals, similar to IO/M

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 IO/M MEMR

IOWR
RD

8085
MEMWR

WR
IOWR

RD WR IO/M Operation
0 0 0 Never Exists -
(RD,WR do not go low
0 0 1 simultaneously) -
0 1 0 Memory Read MEMR
0 1 1 I/O Device Read IOR
1 0 0 Memory Write MEMW
1 0 1 I/O Device Write IOW
1 1 0 - -
1 1 1 - -

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Interrupt & DMA Signals

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8085

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 Serial I/O Control
SID (Serial Input Data)
used to Receive or accept Data serially bit by
bit from the external device

SOD (Serial Output Data)

used to Transmit or send Data serially bit by
bit to the external device

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8085

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 Reset Signals
RESET IN an active low input signal
1.Set Program Counter to Zero PC=0000H(μp will reset)
2.Reset interrupt & HLDA Flip-flops
3. Affects the contents of internal registers randomly

RESET OUT to indicate that the μp was reset (RESET IN =0 )

It also used to reset external devices.

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