HARDWARE SPECIFICATION
OF 8088/8086
MICROPROCESSOR
COURSE CODE: CS-430
COURSE TITLE: MICROPROCESSOR PROGRAMMING AND INTERFACING
PREPARED BY: DR. SYED AQEEL HAIDER
Pins To be discussed in this Lecture
CLK, RESET, READY pins
TEST, RD, WR, IO/M, M/IO pins
INTR, INTA, NMI pins
HOLD, HLDA, SSO, BHE/S7 pins
Current State Table of Minimum Mode 8088
Status Signals (S6-S3) for 8088 / Status Signals (S7-S3) for 8086
8088/8086 Minimum Mode Pins
CLK – Around 5MHz clock input of 33 % Duty Cycle. If fclk = 5MHz then Tclk = 200 nsec.
RESET – If held at logic 1 for at least 4 times TCLK, resets 8088/8086. After reset,
8088/8086 generates address FFFF0h and IF = 0.
READY – If at logic 1, no wait state otherwise Tw inserted in Bus Cycle. Bus Cycle
completes in 4 Tclk (T1, T2, T3 and T4). Detail in coming in next lecture.
8088/8086 Minimum Mode Pins
TEST – It is an input pin. WAIT instruction checks logic level of this pin.
= 0, then the WAIT instruction is executed as an NOP instruction.
= 1, then the WAIT instruction waits for TEST to become 0.
RD – Whenever a read operation is to be performed, 8088/8086 generates logic 0
at this pin.
WR – Whenever a write operation is to be performed, 8088/8086 generates logic
0 at this pin.
IO/M – Selects either IO or Memory during read or write operation for 8088.
= 0, Memory is accessed
= 1, I/O device is accessed
M/IO – Selects either IO or Memory during read or write operation for 8086.
= 0, I/O device is accessed
= 1, Memory is accessed
8088/8086 Minimum Mode Pins
MN/MX – Selects minimum or maximum mode operation for 8088/8086.
= 0, Maximum mode operation is selected
= 1, Minimum mode operation is selected
INTR – Interrupt Request Input, May be enabled/disabled by using logic level of Interrupt Flag
1/0 respectively.
= 0, No Interrupt
= 1, Active Interrupt is present from I/O device(es).
INTA – Interrupt Acknowledge Output, logic 0 is generated to acknowledge interrupt.
NMI – Non Maskable Interrupt Input, it’s operation is independent of interrupt flag.
= 0, No Interrupt
= 1, Active Interrupt is present, Interrupt Vector 2 is used to service the interrupting I/O
device
8088/8086 Minimum Mode Pins
HOLD – DMA Request Input
= 0, No DMA Request
= 1, Active DMA Request from I/O device(es)
HLDA – DMA Acknowledge Output
= 0, No Acknowledgement
= 1, DMA Request is acknowledged
SSO – Status Signal, used with IO/M and DT/R to show current 8088/8086 state/bus cycle.
Table is present in the next slide.
BHE/S7 – Bus High Enable, indicate the use of AD15 – AD8 for data
= 0, Data to be input or output using AD15 – AD8
= 1, No data at AD15 – AD8
8088/8086 Minimum Mode Pins
IO/M DT/R SSO Operation
0 0 0 Opcode Fetch
0 0 1 Memory Read
0 1 0 Memory Write
0 1 1 Passive
1 0 0 Interrupt Acknowledge
1 0 1 I/O Read
1 1 0 I/O Write
1 1 1 Halt
8088/8086 Minimum Mode Pins
S6 – S3 (8088) / S7 – S3 (8086)
S5 = Logic Level of IF S4 S3 Function
S6 = Always 0
0 0 Extra Segment
S7 = Always 1
0 1 Stack Segment
1 0 Code or No Segment
1 1 Data Segment
THANK YOU
