Department of electronics & comm..

Engineering

INDUR
INSTITUTE OF ENGINEERING & TECHNOLOGY

SIDDIPET – 502277

LABORATORY MANUAL

PULSE DIGITAL CIRCUITS LAB

2nd Year 2nd Sem. ECE
(As per 2016-17 Academic Regulation)

Prepared and verified by

1.. S.LATHA

2.…………

DEPARTMENT
OF
ELECTRONICS AND COMMUNICATION ENGINEERING

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PREFACE
In pulse digital circuits lab students will be able to analyze and design different linear and non-linear
waveforms with different time constants and different types of inputs, with and without reference voltages using
linear and non-linear wave shaping circuits. Design, analysis and voltage regulators circuits. To study the
conditions of sampling gates and logic gates. The able to study the different sweep generator circuits like
transistor current sweep miller sweep, boot strap sweep generator will be done.

COURSE OBJECTIVES:

The main objectives are

1. To explain the response of LPRC & HP RC circuit.

2. To explain the clipper and clamper circuits.
3. To explain the transistor switching characteristics.
4. To observes the waveforms of different multivibrator by using transistors.
5. To construct sampling gates and logic gates.
PREREQUISITE:

1. The students already studied the subjects of BEE,AE and PDC. So they will be having theoretical
knowledge about the Experiments.
2. Mean while BEE and AE practical Lab also they finished in the previous semester.
3. Hence they will be having some of the knowledge regarding the Experiments.
4. In the current semester they will improve their skills by doing the experiments
COURSE OUTCOME:

1. Understand the applications of a diode as a integrator and differentiator.

2. Learn different types of clipper circuits and clamper circuits.
3. Find different time switching characteristics of transistor.
4. Designed BMV, AMV, MMV and observed collector voltages.
5. Realizing logic gates by using 7400 sreies IC’s

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CODE OF CONDUCT

1. Students should report to the concerned labs as per the time table schedule.
2. Students who turn up late to the labs will in no case be permitted to perform the experiment scheduled
for the day.
3. After completion of the experiment, certification of the concerned staff in-charge in the observation
book is necessary.
4. As per JNTUH curriculum, this will be evaluated for maximum of 25 marks, out of which 10 marks will
be awarded based on performance in the lab test to be conducted atleast two in a semester / three in a
yearly course .Remaining 15 marks will be based on continuous evaluation method during each lab
session and it should be taken as average of all the experiments.
5. Staff member in-charge shall award marks based on continuous evaluation for each
experiment out of maximum 10 marks and should be entered in the notebook

6. Students should bring a note book of about 100 pages and should enter the readings/observations into
the note book while performing the experiment.
7. The record of observations along with the detailed experimental procedure of the experiment performed
in the immediate last session should be submitted and certified by the staff member in-charge.
8. Not more than three students in a group are permitted to perform the experiment on a setup.
9. The group-wise division made in the beginning should be adhered to, and no mix up of student
among different groups will be permitted later.
10. The components required pertaining to the experiment should be collected from stores in-charge after
duly filling in the requisition form.
11. When the experiment is completed, students should disconnect the setup made by them, and should
return all the components/instruments taken for the purpose.
12. Any damage of the equipment or burn-out of components will be viewed seriously either by putting
penalty or by dismissing the total group of students from the lab for the semester/year.
13. Students should be present in the labs for the total scheduled duration.
14. Students are required to prepare thoroughly to perform the experiment before coming to Laboratory.
15. Procedure sheets/data sheets provided to the students’ groups should be maintained neatly and to be
returned after the experiment.

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INDEX
Sl. No. Name of the Experiment Page No.

LINEAR WAVE SHAPING

1(a) 6-10
RC LP circuit for different time constants

1(b) RC HP circuit for different time constants 11-14

NON-LINEAR WAVE SHAPING

2 (a) 15-23
Transfer char. And response of CLIPPER CIRCUITS

2(b) Transfer char. And response of CLAMPER CIRCUITS 24-28

3 DIODE COMPARATOR 29-31

4 Switching char. of a TRANSISTOR 32-36

5 Design a BISTABLE MUITIVIBRATOR and draw its waveforms 37-40

Design a MONOSTABLE MUITIVIBRATOR and draw its

6 41-44
waveforms

7 Design a ASTABLE MUITIVIBRATOR and draw its waveforms 45-48

8 Response of SCHMITT TRIGGER circuit 49-52

UJT RELAXATION OSCILLATOR

9 53-56

The output- voltage waveform of BOOT STRAP SWEEP circuit

10 57-60

The output- voltage waveform of MILLERS SWEEP circuit

11 61-64

Pulse Synchronization of an ASTABLE circuit

12 65-68

13 Response of TRANSISTOR CURRENT SWEEP circuit 69-71

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List of Experiments beyond the Syllabus

Sl. No. Particulars Page No.
14 study of SAMPLING GATES a) unidirectional gate b) bidirectional gate 72-75

15 study of LOGIC GATES GATES 76-80

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EXPERIMENT NO:-1

LINEAR WAVE SHAPING

A) RC low pass circuit for different time constants

AIM: 1. To design low pass RC circuits for different time constants and verify their responses

For a square wave input of given frequency.

2. To study the operation of low pass circuit as an integrator.

APPARTUS REQUIRED:

1. Dual traces CRO - 1 No

2. Signal Generator - 1 No

COMPONENTS:

1. Resistor (100kΩ) - 1 No

2. Capacitors (0.1uF, 0.01uF & 0.001uF) - 1 No

3. Bread Board - 1 No

4. Connecting wires

5. CRO Probes - 2 No

THEORY

Low Pass RC circuit : The reactance of the capacitor depends upon the frequency of operation. At very high
frequencies, the reactance of the capacitor is zero. Hence the capacitor in fig.1.2 acts as short circuit. As a
result, the output will fall to zero. At low frequencies, the reactance of the capacitor is infinite. So the capacitor
acts as open circuit. As a result the entire input appears at the output. Since the circuit allows only low
frequencies, therefore it is called as low pass RC circuit.

Low pass RC circuit as an integrator: In low pass circuit, if the time constant is very large in comparison
with the time required for the input signal to make an appreciable change, the circuit is called an “integrator”.
Under these circumstances the voltage drop across C will be very small in comparison to the drop across R and

we may consider the t the total input Vi appears across R. ∴i = Vi/R

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DESIGN

Choose T= 1msec ,For RC ˃˃T ; the Low Pass Circuit as an Integrator

RC low pass circuit: (Design procedure for RC low pass circuit)

i) Long time constant: RC >> T ; Where RC is time constant and

T is time period of input signal.

Let RC = 10 T, Choose R = 100kΩ, f = 1kHz.

C = 10 / 103Χ 100Χ103 = 0.1μf

ii) Medium time constant: RC = T

C = T/R = 1/ 103Χ100Χ103 = 0.01μf

iii) Short time constant: RC << T

RC = T/10 ⇒ C = T/10R = 1/ 10Χ103Χ100Χ103 = 0.001 μf.

CIRCUIT DIAGRAM:

RC Low pass circuit

PROCEDURE:

1. Connect the circuit, as shown in figure.

2. Apply the Square wave input to the circuit (Vi = 10 VP-P, f = 1KHz)

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3. Calculate the time constant of the circuit by connecting one of the Capacitor provided.

4. Observe the output wave forms for different input frequencies (RC<<T,RC=T,RC>˃T)

5. Plot the graphs for different input and output waveforms

OBSERVATIONS:

Low pass RC circuit

C C τ=RC T Condition

100 KΩ 0.01μF

100 KΩ 0.01μF

100 KΩ 0.0047μF

100 KΩ 0.01μF

CALCULATIONS:

Theoritical:

For RC<<T

Rise time =2.2RC=0.22ms

Where R=1KΩ

C=0.1uF

Practical:

Rise time=t(2) - t(1)

Where, t1 = time taken to reach 10% of final value

t2 = time taken to reach 90% of final value

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a) RC=T

b) RC >>T

c) RC<< T

INFERENCE:

At low frequencies the capacitor C behaves almost like a open circuit and output is equal to input
voltage. As the frequency increases the reactance of the capacitor increases and C functions almost like a short
circuit and output voltage is equal to zero. So the low pass RC allows low frequency signals and stops high
frequency signals. When the time constant of the circuit is less than the time period of a input signal, the
capacitor charges and discharges quickly. So the shape of the output is same as the input signal. But as the time

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constant of circuit is increases the capacitor charges and discharges very slowly so when the time constant of
the low pass RC circuit is very much greater than the time period of a input signal it acts as a integrator.

PRECAUTIONS:

1. Avoid loose and wrong connections.

2. Avoid eye contact errors while taking the observations in CRO

TROUBLE SHOOTING:

1. Check the diode with DMM.

2. Check the battery connections.

3. Check the CRO probe.

4. Check the FG input voltage.

RESULT:

RC low pass designed, frequency response and response at different time constants is observed.

EXTENSION:

Design low pass filter with a cut-off frequency of 2KHz.

APPLICATIONS:

1. Filter circuits

QUESTIONS

1. Prove that for any periodic input wave form the average level of the steady state output signal from an
RC high pass circuit is always zero.

2. Show that a low pass circuit with a time constant acts as Integrator?

3. a step signal as input and draw its output for a sinusoidal wave?

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B) RC HIGH PASS CIRCUIT

AIM: 1. To design high pass RC circuits for different time constants and verify their responses for a square
wave input of given frequency.

2. To find the % tilt of high pass RC circuit for long time constant.

3. To study the operation of high pass RC circuit as a differentiator

APPARTUS REQUIRED:

1. Dual traces CRO - 1 No

2. Signal Generator - 1 No

COMPONENTS:

1. Resistor (100kΩ) - 1 No

2. Capacitors (0.1uF, 0.01uF & 0.001uF) - 1 No

3. Bread Board - 1 No

4. Connecting wires

5. CRO Probes - 2 No

THEORY

High Pass RC circuit: The reactance of the capacitor depends upon the frequency of operation. At very high
frequencies, the reactance of the capacitor is zero. Hence the capacitor in fig.1.1 acts as short circuit. As a result
the entire input appears at the output. At low frequencies, the reactance of the capacitor is infinite. So the
capacitor acts as open circuit. Hence no input reaches the output. Since the circuit allows only high frequencies,
therefore it is called as high pass RC circuit.

High pass RC circuit as a differentiator: In high pass RC circuit, if the time constant is very small in
comparison with the time required for the input signal to make an appreciable change, the circuit is called a
“Differentiator”. Under these circumstances the voltage drop across R will be very small in comparison with the
drop across C. Hence we may consider that the total input Vi appears across C. So that the current is determined
entirely by the capacitor.

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i = C dVi/dt. The output signal voltage across R is Vo = RC dVi/dt. i.e. The output is proportional to the
differentiation of the input. Hence the high pass RC circuit acts as a differentiator for RC << T.

DESIGN

RC high pass circuit

i) Long time constant: RC >> T ; Where RC is time constant and

T is time period of input signal.

Let RC = 10 T, Choose R = 100kΩ, f = 1kHz.

C = 10 / 103Χ 100Χ103 = 0.1μf

iv) Medium time constant: RC = T

C = T/R = 1/ 103Χ100Χ103 = 0.01μf

v) Short time constant: RC << T

RC = T/10 ⇒ C = T/10R = 1/ 10Χ103Χ100Χ103 = 0.001 μf.

CIRCUIT DIAGRAM:

RC High pass Filter

PROCEDURE:

1. Connect the circuit, as shown in figure.

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2. Apply the Square wave input to the circuit (Vi = 10 VP-P, f = 1KHz)

3. Calculate the time constant of the circuit by connecting one of the Capacitor provided.

4. Observe the output wave forms for different input frequencies (RC<<T,RC=T,RC>˃T)

as shown in the tabular column for different time constants.

5. Plot the graphs for different input and output waveforms.

OBSERVATIONS:

R C C τ=RC T Condition

100 KΩ 0.01μF

100 KΩ 0.01μF

100 KΩ 0.0047μF

100 KΩ 0.01μF

CALCULATIONS:

Theoretical:

For RC == T

%Tilt =T/2RC *100=50%

Where, T=1ms

R = 10 K

C= 0.1 Uf

Practical:

%Tilt=2(V1-V1’)/V*100

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INFERENCE:

The RC high pass circuit in

the reactance of the capacitor depends upon the frequency of operation. At very high frequencies, the
reactance of the capacitor is very low. In the RC low pass circuit the reactance of the capacitor depends
upon the frequency of operation. At very high frequencies, the reactance of the capacitor is almost zero.

PRECAUTIONS:

1. Avoid loose and wrong connections.

2. Avoid eye contact errors while taking the observations in CRO

TROUBLE SHOOTING:

1. Check the diode with DMM.

2. Check the battery connections.

3. Check the CRO probe.

4. Check the FG input voltage.

RESULT:

RC low pass designed, frequency response and response at different time constants is observed.

EXTENSION:

Design high pass filter with a cut-off frequency of 2KHz.

APPLICATIONS:

1. Filter circuits

QUESTIONS

1. When HP-RC circuit is used as Differentiator?

2. Draw the responses of HPF to step, pulse, ramp inputs?

3. Why noise immunity is more in integrator than differentiator?

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4. Why HPF blocks the DC signal?

5. Define time constant?

EXP-2
NON-LINEAR WAVE SHAPING CIRCUITS
A) CLIPPER CIRCUITS
AIM:

1. To study the clipping circuits using diodes.

2. To observe the transfer characteristics of all the clipping circuits in CRO.

APPARATUS REQUIRED:

1. Function generator – 1 No.

2. CRO (20MHZ) Dual trace – 1 No. Each

3. DC power supply (dual)

COMPONENTS:

1. Capacitor 0.1uf - 1 No

2. Resistor 1K, 10 K – 1 each.

3. Diodes (1N4007) – 1 each.

4. Bread Board
5. Connecting Wires -

THEORY:

Clipping circuits basically limit the amplitude of the input signal either below or above certain voltage
level. They are referred to as Voltage limiters, Amplitude selectors or Slicers. A clipping circuit is one, in which
a small section of input waveform is missing or cut or truncated at the output section. Clipping circuits are
classified based on the position of Diode.
1.Series Diode Clipper
2.Shunt Diode Clippe

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CIRCUIT DIAGRAM:

Input Wave Form

Output Wave Forms

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Circuit diagram O/P Wave Forms

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Circuit Diagram: O/P Wave Forms

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Circuit Diagrams: Transfer Characteristics

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PROCEDURE:

1. Connect the circuit as shown in fig.1

2. In each case apply 10 VP-P, 1KHz Sine wave I/P using a signal generator.
3. O/P is taken across the load RL.

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4. Observe the O/P waveform on the CRO and compare with I/P waveform.
5. Sketch the I/P as well as O/P waveforms and mark the numerical values.
6. Note the changes in the O/P due to variations in the reference voltage VR = 2V, 3V..
7. Obtain the transfer characteristics of Fig.1, by keeping CRO in X-Y mode.
8. Repeat the above steps for all the circuit.

OBSERVATIONS:

CALCULATIONS:

NATURE OF GRAPHS:

INFERENCE:

The clipper circuits clips off the some part of the waveform depend on the applied reference voltage.
Clipping circuits do not require energy storage elements these circuits can also used as sine to square wave
converter at low amplitude signals.

PRECAUTIONS:

1. Set the CRO O/P channel in DC mode always.

2. Observe the waveform simultaneously by keeping common ground.
3. See that there is no DC component in the I/P.

RESULT:

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Different types of clipping circuits have been studied and observed the responses for various
combinations of VR and clipping diodes.

EXTENTION:

Clipper circuits can also design as a voltage comparators.

QUESTIONS:

1. Define clipping circuit?

2. What are the different types of clippers?
3. What is a break region?
4. Which kind of a clipper is called a slicer circuit?
5. What are the disadvantages of the shunt clipper?
6. What are the disadvantages of the series clipper?
7. What is piecewise linear mode of a diode?

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EXP-2

B) CLAMPER CIRCUITS

AIM: To study the clamping circuits using diodes and capacitors.

APPARATUS REQUIRED:

1. Function generator – 1 No.

2. CRO (20MHZ) Dual trace – 1 No. Each

3. DC power supply (dual)

COMPONENTS:

1. Resistors ( 100 K )
2. Diodes (1N4007)
3. Capacitor (0.1f)
4. Bread board
5. Connecting wires

Diode Specifications:

Silicon Diode I=1mA V=50v

THEORY:

Clamping circuits add a DC level to an AC signal. A clamper is also refer to as DC restorer or DC re

inserter. The Clampers which clamp the given waveform either above or below the reference level, which are
known as positive or negative clamping respectively.

CIRCUIT DIAGRAM:

I/P & O/P Wave Forms

Vi =5V

t
-5V

V0
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0.5V

V0
t
9.5V
5V

V0 -0.5V

V0

-1.5V
-6.5V
V0

-11.5V
t

Circuit diagram: O/P Wave forms

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PROCEDURE:

1. Connect the circuit as shown in fig.1.

2. Apply a Sine wave of 10VP-P, 1 KHz at the input terminals with the help of Signal Generator.
3. Observe the I/P & O/P waveforms of CRO and plot the waveforms and mark the values with V R = 2
V, 3V
4. O/P is taken across the load RL.
5. Repeat the above steps for all clamping circuits as shown.
6. Waveforms are drawn assuming diode is ideal.

OBSERVATIONS:

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CALCULATIONS:

NATURE OF GRAPHS:

INFERENCE:

In positive peak clamping, Positive peak of the sinusoidal waveform is clamped to 0v

when reference voltage is 0v, and clamped to 2v when reference voltage is 2v.That is the waveform
is shifted to negative side. So we called this clamper as negative clamper. In negative peak clamping,
negative peak of the sinusoidal waveform is clamped to 0v when reference voltage is 0v, and
clamped to -2v when reference voltage is -2v.That is the waveform is shifted to positive side. So we
called this clamper as positive clamper.

PRECAUTIONS:

1. Set the CRO O/P channel in DC mode always.

2. Observe the waveform simultaneously by keeping common ground.
3. See that there is no DC component in the I/P.

TROUBLE SHOOTING:

1. Check the diode with DMM.

2. Check the battery connections.

3. Check the CRO probe.

4. Check the FG input voltage.

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RESULT:

Different types of clamping circuits are studied and observed the response for different combinations of
VR and diodes.

EXTENTION:

Clamper circuits can also design as a diode comparators.

QUESTIONS:
1. What are the applications of clamping circuits?
2. What is the synchronized clamping?
3. Why a clamper is called a dc inserter?
4. What is clamping circuit theorem. How does the modified clamping circuit theorem differs from this?
5. Differentiate negative clamping circuit from positive clamping circuits in the above
circuits?
6. Describe the charging and discharging of a capacitor is each circuit?
7. What is the function of capacitor?
8. What are the effects of diode characteristics on the output of the clamper?

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EXP-3

DIODE COMPARATOR

AIM: To study the diode Comparator.

APPARATUS REQUIRED:

1. CRO
2. RPS
COMPONENTS:

1. Resistor: 1kΩ

2. Diode: 1N4007

3. bread board
4. Connecting wires
DIODE SPECIFICATIONS:

Silicon Diode I=1mA V=50v

THEORY:

The difference between comparator ciucuits and the clipping circuits is that, in a comparator there is no
interest in reproducing any part of the signal waveform, where as in clipping circuit, part of the signal waveform
is needed to be reproduced without any distortion. The basic action of Diode Comparator is to compare the
input voltage and reference voltage. If, Vi<Vr, then the Diode is ON and the output is fixed at vr. When Vi
>Vr, the Diode is OFF. Hence, VO=Vi, the break occurs at Vi=Vr at the time t=t1. The circuit can be used to
mark the instant at which the input voltage reaches a particular reference level Vr.

CIRCUIT DIAGRAM:

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PROCEDURE:

1. Connect the circuit as per circuit diagram shown in Fig.

2. Obtain a sine wave of constant amplitude 8 V p-p from function generator and apply as input to the
circuit.
3. Observe the output waveform and note down the amplitude.
4. Draw the observed output waveforms.
5. To obtain the transfer characteristics apply dc voltage at input terminals and vary the voltage insteps of
1V up to the voltage level more than the reference voltage and note down the corresponding voltages at
the output.
6. Plot the transfer characteristics between output and input voltages.
OBSERVATIONS:

CALCULATIONS:

MODEL WAVE FORMS:

INFERENCE:

Diode as a comparator has been designed operated and output waveforms are observed.

PRECAUTIONS:

1. Set the CRO O/P channel in DC mode always.

2. Observe the waveform simultaneously by keeping common ground.
3. See that there is no DC component in the I/P.
4. To find transfer characteristics apply input to the X-Channel, O/P to YChannel,
Adjust the dot at the center of the screen when CRO is in X-YMode.
5. Both the channels must be in ground, then remove ground and
Plot the transfer characteristics.

TROUBLE SHOOTING:

1. Check the diode with DMM.

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2. Check the battery connections.

3. Check the CRO probe.
4. heck the FG input voltage.

RESULT:

The diode comparator is studied and output wave form is verified.

EXTENSION:

1. Clipper circuits.

APPLICATIONS:

1. Switches
2. Rectifier
3. Converter
4. Modulator
QUESTIONS:

1. Differentiate between Diode and Transistor as a switch?

2. Mention specifications for both Si, Ge diode?
3. Define ON time, OFF time of the diode?
4. In which bias diode acts as a switches?

EXP-4
TRANSISTOR AS A SWITCH

AIM: Design Transistor to act as a Switch and verify the operation. Choose V CC = 12V, ICmax = 5mA, hfe = 100,
VCESat = 0.3v, Vin = 12Vp-p, VBESat = 0.7 V

APPARATUS:

1. CRO.

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2. Function Generator.
3. RPS
COMPONENTS:

1. Transistor (SL100).

2. Breadboard.

3. Resistors (68K, 2.2K).

4. Connecting wires.

SPECIFICATIONS:

IC= 5mA hfe = 100

VBESat = 0.7 V VCESat = 0.3v

THEORY:

When the input voltage Vi is negative or zero, transistor is cut-off and no current flows through R c hence
V0  VCC when I/P Voltage Vi jumps to positive voltage, transistor will be driven into saturation.

DESIGN PROCEDURE:

V0 = Vcc – ICRC  VCESat

When Q is ON RC =

= (12-0.3) / 5 mA = 2.2K

IC= IB *hfe

IBmax= 1.5* IBmin

IBmax=75mA

Vin = IBRB + VBE Sat (Vin consider 6v)

6V = 75mA RB + 0.7V

RB = 68 K (choose practical values as 68K)

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CIRCUIT DIAGRAM:

PROCEDURE:

1. Connect the circuit as shown in figure.

2. Apply the Square wave 12Vp-p frequency of 1 KHz
3. Observe the output waveform at Collector.
4. Find fall time, storage time, delay time, return time.

OBSERVATIONS:

Frequency Td Tr Ts Tf

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1khz

2khz

CALCULATIONS:

T=Ton + T off

Ton = Tr + Td

T off = Ts + Tf

T off > Ton

EXPECTED WAVEFORMS:

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INFERENCE:

Transistor as a switch has been designed operated and output waveforms are observed.

PRECAUTIONS:

1. When you are measuring O/P waveform at collector and base, keep the CRO in DC mode.
2. When you are measuring VBE Sat, VCE Sat keep volts/div switch at either 0.2 or 0.5 position.
3. When you are applying the square wave see that there is no DC voltage in that. This can be checked
by CRO in either AC or DC mode, there should not be any jumps/distortion in waveform on the
screen.

TROUBLE SHOOTING:

1. Check the transistor

2. Check the battery connections.

3. Measure Vbe and Vce with the DMM.

4. Check the CRO probe.

RESULT:

Transistor as a switch has been designed and O/P waveforms are observed.

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EXTENSION:

1. Transistor as an amplifier.

APPLICATIONS:

1. analog circuits
2. voltage regulators
3. amplifiers
4. power transmitters
5. Motor drivers.

QUESTIONS:

1. Differentiate between Diode and Transistor as a switch?

2. Mention typical values of VBE Sat, VCE Sat for both Si, Ge Transistors?

3.Define ON time, OFF time of the transistor?

4. In which regions Transistor acts as a switch?

5. Explain phenomenon of “latching “in a Transistor switch?
6. Define Rise time & fall time of a transistor switch?

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EXP-5
BISTABLE MULTIVIBRATOR

AIM: Design the Bi-stable Multivibrator circuit and observe its response.

APPARATUS:
1. Bi-stable Multivibrator trainer kit
2. Function Generator
3. CRO and CRO probes
4. Connecting wires.

THEORY:
A Bistable circuit is one which can exist indefinitely in either of two stable states and which can be
induced to make an abrupt transition from one state to the other by means of external excitation. The Bistable
circuit is also called as Bitable multivibrator, Eccles Jordon circuit, Trigger circuit, Scale-of-2 toggle circuit,
Flip-Flop & Binary.
A bistable multivibratior is used in a many digital operations such as counting and the storing of binary
information. It is also used in the generation and processing of pulse-type waveform. They can be used to
control digital circuits and as frequency dividers. There are two outputs available which are complements of one
another. i.e. when one output is high the other is low and vice versa .

CIRCUIT DIAGRAM:

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PROCEDURE:
1. Switch ON the system and observe for the power LED indication.
2. Apply two Square waves with same frequency or different frequency at terminals T 1 & T2. You may
observe symmetrical or Asymmetrical square waves respectively. Observe both I/P & O/P
waveforms on CRO.
3. Set the I/P frequency at 500hz.
4. Until you get a 500Hz at the O/P, increase the trigger I/P amplitude, note down the I/P amplitude,
this is the minimum pulse step required for trigger the bi-stable Multivibrator with the given circuit
parameters.
5. Now slowly increase the frequency and at one particular frequency the circuit does not respond and
the output disappears. Just lesser than this frequency, the circuit again responds, this is the maximum
allowable frequency.
6. Sketch the O/P waveforms. Sample O/P waveforms are as shown in figure.

OBSERVATIONS:

S.NO FREQUENCY INPUT OUTPUT

Time voltage Time voltage

CALCULATIONS:
Duty cycle =
=1/2*100
=50%

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EXPECTED WAVEFORMS:
Vt Trigger Input

0 t

V02(v)

VCC

VCE sat
t

V01(v)

VCC

VCE sat
t

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INFERRENCE:
Bistable Multivibrator has two stable states. It is designed and the waveforms are observed.

PRECAUTIONS:
1. Loose and wrong connections should be avoided.
2. Parallax error should be avoided.

TROUBLE SHOOTING:
1. Check the transistor
2. Check the battery connections.
3. Measure Vbe and Vce with the DMM.

4. Check the CRO probe.

RESULT:
Bistable Multivibrator circuit is designed and output waveforms are observed.

EXTENSION:
1. Schmitt trigger is an extension of BMV.
2. By using IC (op-amp) we can design BMV

APPLICATIONS:
1. Memory element
2. Flip-flop
3. Binary counting
4. Data storing

QUESTIONS:

1. What are the applications of a Bitable multivibrator?

2. Describe the operation of commutating capacitors?
3. Why a Binary is also called a flip-flop?
4. Mention the name of different kinds of triggering used in the circuit shown?
5. What are the disadvantages of direct coupled Binary?
6. How many types of unsymmetrical triggering are there?
7. What are catching diodes?
8. Which triggering is used in binary counting circuits?

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EXP-6
ASTABLE MULTIVIBRATOR
AIM:
To design an Astable Multivibrator to generate a Square wave of 1 KHz frequency.

APPARATUS:

1. Astable Multivibrator trainer kit

2. Function Generator
3. CRO and CRO probes
4. Connecting wires

THEORY:

The astable circuit has two quasi-stable states. Without external triggering signal the astable
configuration will make successive transitions from one quasi-stable state to the other. The astable circuit is an
oscillator. It is also called as free running multivibrator and is used to generate “Square Wave”. Since it does
not require triggering signal, fast switching is possible.

CIRCUIT DIAGRAM:

PROCEDURE:

1. Connect the circuit as shown in figure.

2. Observe the Base Voltage and Collector Voltages of Q1 & Q2 on CRO in DC mode and plot them.
3. Verify the frequencies theoretically.

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OBSERVATIONS:

S.NO OUTPUT TRANSISTOR IN TRANSISTOR IS

VOLTAGES ON OFF

VC1

VC2

VB1

VB2

CALCULATIONS:
Duty cycle =
=1/2*100
=50%
F= 1/ T= (1/1.38RC)
R= 10K Ω C=0.1µF

EXPECTED WAVEFORMS:

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INFERRENCE:
Astable Multivibrator has two quasi stable states. It is designed and the waveforms are observed.

PRECAUTIONS:
1. Loose and wrong connections should be avoided.
2. Parallax error should be avoided.

TROUBLE SHOOTING:
1. Check the transistor
2. Check the battery connections.
3. Measure Vbe and Vce with the DMM.

4. Check the CRO probe.

RESULT:
Astable Multivibrator circuit is designed and output waveforms are observed.

EXTENSION:
By using IC (op-amp) we can desing AMV.

APPLICATIONS:
1. Trigger
2. Convertor

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3. Moderator
4. Divider.

QUESTIONS:

1. Is it possible to change time period of the waveform without changing R & C? Support your answer?
2. Collector waveforms are observed with rounded edges. Explain?
3. Explain charging and discharging of capacitors in an Astable Multivibrator?
4. How can an Astable multivibrator be used as VCO?
5. Why do you get overshoots in the Base waveforms?
6. What are the applications of Astable Multivibrator?
7. How can Astable multivibrator be used as a voltage to frequency converter?
8. What is the formula for frequency of oscillations?
9. What are the other names of Astable multivibrator?

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EXP-7
MONOSTABLE MULTIVIBRATOR

AIM: To design a monostable multivibrator for the Pulse width of 0.03mSec.

APPARATUS:

1. Monostable Multivibrator trainer kit.

2. Function Generator.
3. CRO.
4. Multi-meter.
5. Connecting patch cards.
THEORY:

The monostable circuit has one permanently stable and one quasi-stable state. In the monostable
configuration, a triggering signal is required to induce a transition from the stable state to the quasi-stable state.
The circuit remains in its quasi-stable for a time equal to RC time constant of the circuit. It returns from the
quasi-stable state to its stable state without any external triggering pulse. It is also called as one-shot a single-
cycle, a single step circuit or a univibrator.

CIRCUIT DIAGRAM:

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PROCEDURE:

1. Switch ON the trainer kit and observe power indication.

2. Wire the circuit as shown in the circuit diagram.
3. Calculate the pulse width (T) of the Monostable O/P with the selected values of R & C on the CRO.
See that CRO is in DC mode.
4. Select the triggering pulse such that the frequency is less than 1/T
5. Apply the triggering input to the circuit and to the CRO’s channel 1 . Connect the CRO channei-2 to
the collector and base of the TransisterQ1&Q2..
6. Adjust the triggering pulse frequency to get stable pulse on the CRO and now measure the pulse
width and verify with the theoretical value.
7. Obtain waveforms at different points like VB1, VB2, VC1 & VC2.
8. Repeat the experiment for different combinations of R & C (C = 1nf, 100nf). Calculate R for same
value of T = 0.3 mSec.

OBSERVATIONS:

S.NO OUTPUT TRANSISTOR IN TRANSISTOR IS

VOLTAGES ON OFF

VC1

VC2

VB1

VB2

CALCULATIONS:
Duty cycle =
=1/2*100
=50%
Tp = (0.69RC)
R= 10K Ω C=0.1µF

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EXPECTED WAVEFORMS:

INFERENCE:
Monostable Multivibrator has one stable state and one quasi stable state. It is designed and the
waveforms are observed.

PRECAUTIONS:
1. Loose and wrong connections should be avoided.
2. Parallax error should be avoided.

TROUBLE SHOOTING:
1. Check the transistor
2. Check the battery connections.
3. Measure Vbe and Vce with the DMM.

4. Check the CRO probe.

RESULT:
Monostable Multivibrator circuit is designed and output waveforms are observed.

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EXTENSION:
By using IC (op-amp) we can desing MMV.

APPLICATIONS:
Monostable multivibrator is mainly used as timer.

QUESTIONS:

1. What are applications of Monostable Multivibrator?

2. Why a Monostable Multivibrator is called a gating circuit?
3. Explain the waveform of VB1?
4. Describe the operation of the capacitor C3 in the circuit?
5. Why is the time period T also called Delay time?
6. Justify, Why Monostable Multivibrator is called one-shot circuit?
7. Why is the –ve voltage given at the base of Q1 transistor?
8. What is the no of quasi & stable states of Monostable Multivibrator?

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EXP-8

SCHMITT TRIGGER

AIM: To Study the operation and working principle of Schmitt Trigger

(a) To Obtain the UTP and LTP values practically and verify it theoretically
(b) To obtain square wave from the sine wave.

APPARATUS:-
1. Schmitt Trigger trainer kit
2. Function Generator
3. C.R.O
4. Connecting wires.

THEORY:
In digital circuits fast waveforms are required i.e, the circuit remain in the active region for a
very short time (of the order of nano seconds) to eliminate the effects of noise or undesired parasitic
oscillations causing malfunctions of the circuit. Also if the rise time of the input waveform is long, it
requires a large coupling capacitor. Therefore circuits which can convert a slow changing waveform
(long rise time) in to a fast changing waveform (small rise time) are required. The circuit which
performs this operation is known as “Schmitt Trigger”. In Schmitt trigger circuit, the output is in one of
the two levels namely low or high. When the input voltage is rising above the UTP (upper threshold
point) i.e. V1, the output changes to high level. Similarly when a falling output voltage passes through a
voltage V2 known as lower threshold point (LTP), the output changes to low. The level of the output
changes V1 is always greater than V2.The differences of these two voltages is known as “Hysteresis”.

CIRCUIT DIAGRAM:

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PROCEDURE:
1. Switch ON the trainer
2. Connect the circuit as shown in Fig.
3. With Vi = 0V, measure the output voltage.
4. Slowly increase the input voltage from 0V to maximum and observe the output for the transition.
5. Obtain the voltage at which the LOW to HIGH transition is occurred and this is the UTP and now
measure the input voltage.
6. Now, slowly decrease the input voltage and observe for the HIGH to LOW transition at the output, the
input voltage at this point is called the LTP.
7. Apply a sine wave input to the circuit.
8. Observe the input and output waveforms on CRO.
9. Vary the input frequency and comment on the results obtained.
10. Repeat the experiment with different R2.
11. Verify the result theoretically.

OBSERVATIONS:

S.NO OUTPUT TRANSISTOR IN TRANSISTOR IS

VOLTAGES ON OFF

VC1

VC2

CALCULATIONS:

DC AC
UTP = 2.9V UTP = 3V
LTP = 1.8V LTP = 2V
VH = UTP – LTP VH = UTP – LTP

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EXPECTED WAVEFORMS:

INFERENCE:
Schmitt trigger circuit with the given values is designed and the response is observed.

PRECAUTIONS:
1. Loose and wrong connections should be avoided.
2. Parallax error should be avoided.

TROUBLE SHOOTING:
1. Check the transistor
2. Check the battery connections.
3. Measure Vbe and Vce with the DMM.

4. Check the CRO probe.

RESULT:
After finishing this experiment Design Schmitt trigger circuit using transistor and they are able to find
UTP and LTP.

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EXTENSION:
By using IC (op-amp) we can desing Schmitt trigger circuit.

APPLICATIONS:
1. Comparator circuit

RESULT:

A collector coupled Monostable Multivinbrator is designed and the waveforms are observed and
verified.

QUESTIONS:
1. What are the applications of Schmitt Trigger?
2. Define hysteresis action?
3. Why Schmitt Trigger is called a squaring circuit?
4. What is UTP?
5. What is LTP?
6. What is the difference between a Binary and Schmitt Trigger?

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EXP-9

UJT RELAXATION OSCILLATOR

AIM: To study the operation of UJT Relaxation Oscillator

APPARATUS:
1. Resistors (470E, 220E, 100K Potentiometer)
2. Capacitors (.01F,0.1F, 1F)
3. Cathode Ray Oscilloscope
4. Bread board
5. UJT (2N2646)

THEORY:

The UJT exhibits a negative resistance characteristics, it can be used to provide time delayed trigger
pulses for activating other devices like SCR. The basic trigger circuit is shown in the figure. The external
resistances RB1 and RB2 are of the UJT base. The emitter potential Ve is varied depending on the charging rate of
capacitor C. The Charging resistance Rc should be such that the load line intersects the device characteristics
only , in the negative resistance region AB. If the Rc load line intersects the device characteristics either in
region PR or in BQ ,the resulting operating point will be stable and the circuit will not oscillate. This sets the
max and minimum limits on the permissible values of Rc.

As the Capacitor charges, when the emitter voltage goes to the peak point voltage ( Vb +VD ) ,
regeneration will start and the capacitor will discharges through resistor R B1. The rise time of the output pulse
will depend on the switching speed of the UJT, and the duration will be proportional to the time constant R B1C
of the discharge circuit. The emitter –base -1 diode will again be reverse biased until the capacitor is charged to
(Vb +VD ) .

CIRCUIT DIAGRAM:

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PROCEDURE:
1. Connect the circuit as shown in figure. Apply 15V DC power supply to the circuit.
2. Observe the output pulses on the CRO at B1, B2 and Ve (Vc).
3. Vary the time constant (RC) by varying capacitance value and potentiometer value (R) ,observe the
variations in the out pulses on the CRO at B1, B2 and Ve (Vc).
4. Plot the graphs as shown in the expected waveforms.

OBSERVATIONS:

R C T

1K 0.01F,

10K 0.1F

100K 1F

CALCULATIONS:

Formula

T = RC ln (Vcc-Vv/Vcc-Vp)

EXPECTED WAVEFORMS:

The UJT relaxation oscillator output wave forms are as shown in the figure.

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INFERENCE:
The operation of UJT as relaxation oscillator is studied.

PRECAUTIONS:
1. Connections should be made carefully.
2. Loose and wrong connections should be avoided.
3. Note down the parameters carefully.

TROUBLE SHOOTING:
1. Check the UJT terminals.

2. Check the supply connections.

3. Measure peak point and valley point.

4. Check the CRO probe.

RESULT:

The waveforms are plotted as shown and the practical T is verified to the theoretical value.

EXTENSION:
By using IC (op-amp) we can design circuit.

APPLICATIONS:
1. Sawtooth generators
2. Simple oscillators
3. Phase control
4. Timing circuits.
5. Relaxation Oscillator

QUESTIONS:

1.
2. What is a relaxation oscillator?
3. Specifications of UJT?
4. What is the importance of UJT?
4. When will be UJT is switched

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EXP-10

BOOTSTRAP SWEEP GENERATOR

AIM: To study Bootstrap sweep generator

APPARATUS:
1. Bootstrap trainer kit
2. CRO and CRO probes
3. RPS

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4. FG
5. Connecting Wires

THEORY:
The input to Q1 is the gating waveform. Before the application of the gating waveform, at t = 0,
transistor Q1 is in saturation. The voltage across the capacitor C and at the base of Q2 is VCE(sat). To ensure
Q1 to be in saturation for t = 0, it is necessary that its current be at least equal to ICE / hFE so that Rb < hfeR.
With the application of the gating waveform at t = 0, Q1 is driven OFF. The current IC1 now flow into C and
assuming units gain in the emitter follower V0 . When the sweep starts, the diode is reverse biased, as already
explained above, the current through R is supplied by C1. The current VCC / R through C and R now flows
from base to emitter of Q2.if the output V0 reaches the voltage VCC in a time TS / Tg, then from above we
have TS = RC.

CIRCUIT DIAGRAM:

PROCEDURE:
1. Connect the circuit diagram as shown in the figure .(1) Apply +15V (Vcc) & -15V(-V EE ) DC as power
supply to the circuit.
2. Apply 1kHz symmetrical square wave signal with the help of signal generator.
3. Observe the input and output wave forms of CRO and plot the waveforms.
4. Calculate the sweep & retrace time from the CRO .
5. Clarify the values with the theoretical calculation.

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OBSERVATIONS:

Rc Cs Ts

CALCULATION:

Ts = Rc1.Cs

Tr = ( [

Whose Vs =

Tg = 1msec

EXPECTED WAVE FORMS:

Vi

Tg

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Tg

Ts

Tr

INFERENCE:
The operation of Bootstrap sweep generator is studied.

PRECAUTIONS:
1. Connections should be made carefully.
2. Loose and wrong connections should be avoided.
3. Note down the parameters carefully.

TROUBLE SHOOTING:
1. Check the supply connections.

2. Check the CRO probe.

RESULT:

The waveforms are plotted as shown and the practical T is verified to the theoretical value

EXTENSION:
By using IC (op-amp) we can design Bootstrap sweep generator circuit.

APPLICATIONS:
1. Constant charging current

QUESTIONS:

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1. Explain the basic principle involved in Bootstrap Sweep generator?

2. Mention the type of feedback employed in Bootstrap Sweep generator?
3. Mention the characteristics of the amplifier used in Bootstrap sweep generator?

EXP-11

MILLERS SWEEP GENARATOR

AIM: to generate a saw tooth wave form using miller sweep circuit.

APPARATUS:-

1. Miller sweep trainer kit

2. CRO and CRO probes
3. RPS

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4. FG
5. Connecting Wires

THEORY:

The miller sweep circuit or miller integrator generator is a precise and linear ramp voltage using active
devices providing required feedback, the effective time constant and supply voltage is enhanced.Miller sweep
circuit is the basic schematic of a widely used sawtooth generator.
The amplifier acts to increase the aiming potential; thus, linearity is improved and the output amplitude
is increased. As the integral of a step function is a ramp, it is evident that this circuit would provide a sawtooth
output. The feedback can be negative voltage or current type. The circuit of miller sweep generator is drawn
below. It uses a bjt, the switch shown in the fig. Is an ideal switch normally it is closed. The transistor is in off
condition. The timing capacitor is charged to a voltage Vcc via the resistor Rc and the switch.

CIRCUIT DIAGRAM:

PROCEDURE:

1. Connect the circuit as shown in Fig.

2. Observe the waveforms on the CRO.
3. Observe the input and output waveforms on CRO.
4. Plot the waveforms

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OBSERVATIONS:

S.No Ts Tr

CALCULATIONS:

1. Ts=

2. Tr=

MODEL WAVEFORMS:

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INFERENCE:
The operation of miller sweep generator is studied.

PRECAUTIONS:
1. Connections should be made carefully.
2. Loose and wrong connections should be avoided.
3. Note down the parameters carefully.

TROUBLE SHOOTING:
1. Check the supply connections.

2. Check the CRO probe.

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RESULT:

The waveforms are plotted as shown and the practical Ts and Tr is verified to the theoretical value.

The saw tooth wave form is generated by using miller Sweep circuit.

EXTENSION:
By using IC (op-amp) we can design Bootstrap sweep generator circuit.

APPLICATIONS:
1. Constant charging current

QUESTIONS:

1. Explain the basic principle involved miller sweep circuit generator?

2. Mention the type of feedback employed in miller sweep circuit generator?
3. Mention the characteristics of the amplifier used in miller sweep circuit generator?

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EXP-12

PULSE SYNCHRONIZATION OF AN ASTABLE MULTIVIBRATOR

AIM: To study pulse synchronization of an astable multivibrator and also to calculate time and frequency.

APPARATUS:-

1. Pulse synchronization trainer kit

2. CRO and CRO probes
3. Connecting Wires

THEORY:

A multivibrator system is an electronic circuit that switches rapidly by means of positive feedback
between two states. There are three types of multivibrator circuits depending on its realization: astable,
monostable, and bistable. Here, we are interested in the astable multivibrators, also called free-running
multivibrators, because they are used in some timing event devices, and they can be set by a suitable and simple
electronic network.

Synchronization can be understood as the coordination of events to operate a system in unison.

Oscillators synchronization is an important issue, for instance, in some synthesizers with two or more voltage-
controlleroscillator. Or to synchronize digital devices that are sharing data, and so on. Moreover, and according
to coupled limit cycle oscillators.

CIRCUIT DIAGRAM:

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PROCEDURE:

1. Switch ON the trainer kit.

2. Connect the pulse output to the pulse input.
3. Connect the CRO CH1 to the V1 and CH2 to the pulse output Observe the input and output and observe
the output by varying the pulse frequency.
4. Note down the waveforms

OBSERVATIONS:

R C T=RC

CALCULATIONS:

t= t1 + t2

t1 ---rise time

t2 ---- return time

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MODEL WAVEFORMS

INFERENCE:
The operation of study pulse synchronization of an astable multivibrator is studied.

PRECAUTIONS:
1. Connections should be made carefully.
2. Loose and wrong connections should be avoided.
3. Note down the parameters carefully.

TROUBLE SHOOTING:
1. Check the supply connections.

2. Check the CRO probe.

RESULT:

The waveforms are plotted as shown and the practical T1 and T2 value. The wave form is generated by
using pulse synchronization of an astable multivibrator circuit.

EXTENSION:
By using IC (op-amp) we can design Bootstrap sweep generator circuit.
APPLICATIONS:
1. frequency divider
2. relaxation circuits

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RESULT: QUESTIONS:

1. Explain the basic principle of pulse synchronization of an astable multivibrator?

2. Mention the type of feedback employed in pulse synchronization?
3. Types of pulse synchronization?
4. Explain meaning of pulse synchronization?

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EXP-13

TRANSISTOR CURRENT SWEEP GENERATOR

AIM: To observe and to study of transistor current sweep generator.

APPARATUS:-

1. Transistor current sweep trainer kit

2. CRO and CRO probes
3. Connecting Wires

THEORY:

Ideal c constant current source has infinite source impedance. The ideal capacitor charge and
discharges. It is generates the ramp waveform. The circuit gives of a free running ramp generator realized by a
constant current source and a complementary switch. Here capacitor c chares from the constant current source
using pnp transistor and zener diode. The sweep duration t is decided by the magnitude of constant current and
vref applied to the complementary switch.

CIRCUIT DIAGRAM:

PROCEDURE:

1. Switch ON the trainer kit.

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2. Connect 10V supply to the Vref terminals.

3. Connect the CRO terminal and observe the output by varying the capacitor.

4. Note down the waveforms.

OBSERVATIONS:

R C T=RC

CALCULATIONS:

t= t1 + t2

t1 ---rise time

t2 ---- return time

MODEL WAVEFORMS

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INFERENCE:
The operation of study transistor current sweep generator is studied.

PRECAUTIONS:
1. Connections should be made carefully.
2. Loose and wrong connections should be avoided.
3. Note down the parameters carefully.

TROUBLE SHOOTING:
1. Check the supply connections.

2. Check the CRO probe.

RESULT:

The waveforms are plotted as shown and the practical T1 and T2 value. The wave form is generated by
using transistor current sweep generator circuit

EXTENSION:
By using IC (op-amp) we can design Bootstrap sweep generator circuit.

APPLICATIONS:
1. relaxation circuits
QUESTIONS:

1. Explain the basic principle of transistor current sweep generator circuit?

2. Mention the type of feedback employed in transistor current sweep generator circuit?

3. Types of sweep generator circuit?

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EXP-14

STUDY OF SAMPLING GATES

AIM: To Study the operation of sampling gates using method of four diode gate.

COMPONENTS REQUIRED:

1.Sampling gate trainer.

2. Function generator.
3. RO and CRO probe
4. DMM.

THEORY:

A Sampling Gate is basically a transmission circuit which allows an input signalto pass through it during a selected
interval; and blocks its passage outside the timeinterval. The input signal does not suffer any distortion or attenuation during
transmission,with the result that the output waveform is an exact replica of the input signal waveform.Hence the output of a
sampling gate is an exact reproduction of the input signal duringthe selected interval, and is zero otherwise.The interval of the time
is selected by means of an external signal termed asGating Signal. The gating signal is generally a rectangular pulse of the required
polarity.

CIRCUIT DIAGRAM:

Unidirectional sampling gates

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Bidirectional sampling gates

PROCEDURE:

1. Connect the circuit as shown in figure.

2. 2 Switch ON the trainer kit.3
3. Apply input signal frequency of 500Hz
4. Observe the out put wave form on CRO

OBSERVATIONS:

CALCULATIONS:

EXPECTED WAVEFORM:

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INFERENCE:
The operation of sampling gates is studied.

PRECAUTIONS:
1. Connections should be made carefully.
2. Loose and wrong connections should be avoided.
3. Note down the parameters carefully.

TROUBLE SHOOTING:
1. Check the supply connections.

2. Check the CRO probe.

RESULT:

The sampling gates waveforms are generated.

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EXTENSION:
By using four diodes and six diodes sampling gates circuits we can design .sampling gate circuits can
be constructed using bipolar transistors, or FETs.

APPLICATIONS:
1. Multiplexers
2. Sampling scopes
3. dc or low-frequency signals

QUESTIONS:

1. What is mean by sampling gate?

2. Sampling gate is a linear gate true or false?

3. What is mean by gating signal?

4. In how many ways we can design sampling gates?

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EXP-15

SUTDY OF LOGIC GATES GATES

AIM: To verify different logic gates truth tables.

EQUIPMENT REQUIRED:
1. Regulated power supply

COMPONENETS REQUIRED:
1. Bread board
2. Ic trainer kit patch cards
3. Ic’s 7400, 7402,7404,7408,7432 & 7486
4. Connecting wires.

THEORY:
In digital electronics, the binary digits 0 and 1 are represented by voltages low and high. This branch of
electronics is mathematically supported by Boolean algebra. The basic logic operations in this algebra are NOT,
AND and OR gates. These logic operators are binary as they work on two operands to specify the output

CIRCUIT DIAGRAM:

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PROCEDURE:

1. Connect the IC on the breadboard.

2. Give two input connections from the trainer kit as in its pin diagram.

3. Connect the ground & apply a dc signal of 5V from the external power supply.

4. Make the connections as per the pin diagram.

5. Switch on the power supply.

6. Apply one combination of inputs and verify the truth table of that IC for that input combination.

7. Repeat this for all possible combinations.

8. For remaining IC’s repeat the steps from 1 to 7. Truth tables of logic gates are verified.

OBSERVATIONS:

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CALCULATIONS:

NATURE OF GRAPH:

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INFERENCE:

The all logic gates are verified.

PRECAUTIONS:-

1. Avoid loose and wrong connections.

TROUBLING THOOTING:

1. Ic correctly inserted are not in bread board.

2. Check the Connecting wires.
3. Check the supply connections

RESULT:

1. Truth tables of different it logic gates are verified.

2. Output of the given circuit is verified.

3. Logic gates are realized using universal gates.

EXTENSION:

The using of all logic gates can implement with transistor ans fets.

APPLICATIONS:

1. Digital circuits

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2. Memory elements

QUESTIONS:

1. What is logic gate and by using which devices we can realize the logic gates?

2. What is combination circuit?

3. Realize the NAND gate using AND, OR and NOT gates?

4. What is truth table?

5. What is IC and give some IC’s name for logic gates?

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