yD 2) 3) ( Appendix - [Instruction set of 8085 | Data Transfer Group : _ MOV tz, ts : [MOVE REGISTER] Format : [ral [rs] Addressing: Register addressing Group : Data transfer group Bytes : 1byte Flag: None Comment : This instruction will copy destination register with the content of son register. The contents of source register are not altered ie. they remain unchanged raand r, can be of one of the registers A,B, C,D, E,H, L. Example: Let [A] = 05H and [B] = 55H Instruction : MOV A,B After execution: [A] = 55H and [B] = 55H MOV r, M: [MOVE FROM MEMORY] Format: fe] < [[-L]] Addressing: Register Indirect addressing Group: Data transfer group Bytes : 1 byte Flag: None Comment : This instruction will load destination register with content of memory location, whose address is stored in H-L register pair. The contents of memory location are not altered. r can be any one of the registers A, B, C, D, E, H, L. Example : Let, [H-L] = CFFF H, [CFFF] = 35H and [B] = 82H Instruction : MOV B,M After execution: — [B] = 35H [CFFF] = 35H MOV M,r: [MOVE TO MEMORY] Format : [(H-L]] < [r] Addressing : Register Indirect Group : Data transfer group Byte: 1 byte Flag : NoneTroon ——— 4) 5) 6) Comment : This instruction will copy the content of register r to the memory location, whose address is placed in H-L register pair. r can be any one of the A, B,C, D, E, H, L. Example : Let [HL] = FOO0H and [F000] = 40H and [C] = FAH then Instruction : MOV M, C After execution: [C] = FAH [F000] = FAH MVI+z, data : [MOVE IMMEDIATE 8-BIT] Format : [r] <— data (second byte) Addressing : Immediate addressing Group : Data transfer group Bytes : 2bytes Flag : None Comments : This instruction will load the register r with 8-bit immediate data specified in second byte of instruction. Example : Instruction : MVI A, 35H This instruction will load accumulator with immediate data 35H. MVIM, data: [MOVE IMMEDIATE 8-BIT] Format : [[H-L]] < data (second byte) Addressing : Immediate / Register indirect address Group : Data transfer group Bytes : 2 bytes Flag: None Comment : This instruction will load the memory location, whose address is stored in HLL pair with 8-bit immediate data specified in the second byte of instruction. Example: Let [H] [L] = D000H Instruction : MVI M, 35 H Above instruction will load memory location DO0OH with immediate data 35 H. LXI rp, 16-bit data : [LOAD REGISTER PAIR IMMEDIATE] Format : [tp] < 16-bit data i.e. [rm] — byte 3, [m1] — byte 2 Addressing : Immediate Group : Data transfer group Bytes : 3 bytes Flag : None8) 9) NE of Bogs, Comment : The byte 3 of instruction is moved into high order register (1) of pair rp and byte 2 is moved into low order register (n) of register Pair. The re, fist can be BC, DE, HL or SP. [SP (stack pointer) is not a valid register pair, but 1 canbe ve in LX] instruction] Example : LXIH, 3500 H. / This instruction will load H-L pair with 3500 H. 35 H will be loaded in high ore register(H) and 00H will be loaded in low order register (L). ler LDA addr : [LOAD ACCUMULATOR DIRECT] CEA ' Format : [A] & [[byte 3] [byte 2]] Addressing: Direct addressing mode Group : Data transfer group Bytes : 3 bytes Flag: None Comment : This instruction will load accumulator with content of memory location, whose address is given in the instruction itself. The contents of memory location are not altered. Example: Let [C500] = 26 H Instruction ; LDA C500 After execution : [A] =26H [C500] = 26 H STA addr: [STORE ACCUMULATOR DIRECT] Een Format : U[byte 3] [byte 2]] — [A] Addressing: Direct addressing Group : Data transfer group Bytes : 3bytes Flag : None Comment : This instruction will load the content of accumulator into the memory location, whose address is specified in the instruction. The contents of accumulator are not altered. Example : Let [A] =35H Instruction : STA C500 H After execution : [C500] = 35 H [A] =35H LHLD addr : [LOAD H AND L REGISTER DIRECT] CEO Format : [L] — [[byte 3] [byte 2]] [HI] < [[byte 3] [byte 2] + 1 Addressing : Direct addressing Group : Data transfer group Bytes : 3 bytes Flag: None10) 11) Comment : In this instruction, the first byte gi z - : gives the opcode and , give 16bit address of memory location in usual convention, —— bone Ration whose address is specified in the instruction are loaded i eee lonent of next memory location loaded in register H eee For example : . Let memory location 2100 H contains 31 H ‘i execution of instruction and 2101 H contains 52 H then after LHLD 2100 H Register H will contain 52 H and register L will contain 31 H. G SHLD addr : [STORE H AND L REGISTERS DIRECT] REE Format : [[byte 3] [byte 2]] — [L] [[byte 3] [byte 2] + 1] — TH] Addressing : Direct addressing wisee Toe) Group : Data transfer group Bytes : 3 bytes Flag: None ansferred to the memory location whose Comment : The contents of register L are tr nts of register H are address is specified by byte 2 and byte 3 of the instruction. The conte! moved to succeeding memory location. Example : Let [H] = 32 Hand [L]=35H Instruction : SHLD 2100 H ‘After execution : [2100] = 35 H [2101] =32H LDAX rp : [LOAD ACCUMULATOR INDIRECT] TREE Format : [al < [hp Addressing: Register indirect Group : Data transfer group Bytes : 1byte Flag : NoneTPS Computer Science - I! — Comment : The contents of memory location, whose address is stored in register >> are loaded into accumulator. The content of memo" Pair be B (ie. Band C) or D (te D and B) Let [B] = 25H, [Cl = ry location remain unchanged TP can 25 H and [2525] = 33H Example Instruction LDAXB ‘After execution : [A= 33H 32) STAX rp: [STORE ACCUMULATOR INDIRECT] TEA, Format Up CAT Addressing, Register Indirect addressing, Byte: 1 byte Group : Data transfer group Flag : None Comment : The contents of accumulator are transferred to the memory location whose address is stored in register pair rp. The valid register pairs are B (ie. B& C) and Die D&E) Example : Let [D] = 25 H and [E] = 25H, [A] =55H Instruction: STAXD ‘After execution : [2525] = 55 H 43) XCHG : [EXCHANGE H.AND L WITH DANDE] Format: fH] 1D} < [E] ‘Addressing: Register Group : Data transfer group Bytes : 1 byte Flag: None Comment : The contents of register H are exchanged with that of register D and the contents of register L are exchanged with that of register E. Example : Let [H] = 23 H, [L] =32H, [D] = 53 Hand [E)=55H Instruction : XCHG ‘After execution : [H] = 53 Hand [L] =55H, [D] = 23 Hand [E] =32H __ 1) Arithmetic Group: —_ y) ADDr: [ADD REGISTER] Format : [A] fA] +E] Addressing : Register addressing, Group : Arithmetic group Bytes : 1 byte Flag : All3) cs /MStruction Set and Pre 2 : - —_SStruction Set and Programming of 8085 Comment : The contents of register r are added to the cont The result Com accumulator Alle age ne 2 conten of accumulator. The result Example : Let, [D] = 35 H and [A] = 05 Hi : Instruction : ADD D Addition: 35H = 00110101 +05H = 0000 0101 3AH = 00111010 s=0, Z=0, AC=0 P=1, Cy=0 After execution : [A] = Flag Register = | 0 | 0 | - | 0 | - 1]-[o| [D] = ADD M: [ADD MEMORY CONTENT TO ACCUMULATOR] Format : [A] 1A] + [04] (L]] Addressing: Register Indirect addressing Group : Arithmetic group Bytes : 1 byte Flags : All Comment : The contents of accumulator are added to the content of memory location, whose address is stored in H-L pair. The result is placed in accumulator. All flags may be affected. Example: Let [H-L] = D000 H, [D000] = 51 H and [A] = 35H Instruction : ADDM After execution : [A] = 86 H and [D000] = 51 H ADI data: [ADD IMMEDIATE TO ACCUMULATOR] Format : [A] < [A] + data (byte 2) Addressing : Immediate addressing Group : Arithmetic group Bytes : 2bytes Flag: All 8-bit immediate data specified in second byte of Comment : This instructions adds the r. All flags may be affected. instruction to the content of accumulato! Example: Let [A] = EAH Instruction: ADI15H5) 11101010 1 1 11111111 Addition:(A): EAH = Data: +15H FFH = Flags: S=1, Z=0, Ac=0 P=1, Cy=0 ion : [A] = FFH ‘After execution : [A] UMULATOR WITH CARRY REIETORTR I ADC r: [ADD REGISTER TO ACC [A] < [A] + Ir] + [Cy] Format: Addressing : Register addressing Group : Arithmetic group Bytes : 1 byte Flags : All ent : This instructions adds the content of accumulator to the content of register - Comm and the content of the carry flag. The result is placed in accumulator. All flags may be affected. Example : Let [A] = 5F H, [D] = 33 H and [Cy] =01H Instruction : ADC D Addition : [A]:5FH = 01011111 :433H = 0110011 000001 [Note : This instructions generally used in 16-bit addition. For examples to add the content of BC register to the content of DE registers, this instruction is used to account for the carry generated by low order byte.] ADC M: [ADD MEMORY CONTENT TO ACCUMULATOR WITH CARRY] [A] — [A] + [[H-L] + [Cy] Format : Addressing: Register Indirect Group : Arithmetic Byte : 1 byte Flag: All Comment : The contents of memory location whose address place in H-L register pat and content of Cy flag are added to the content of accumulator. The result is placed < accumulator. Example : Let [HL] = FO00H [A] =35Hiter Science - IT TPS Computer 238 Instruction Set and Programming of 8085 [Cy] = OOH, [Fo00E] = o5 H — Instruction : ADC M After execution : Al=3AH SZ a p Cy rag LoTo[-To]-[1 -[o] 6 ACIdata: [ADD IMMEDIATE TO ACCUMULATOR WITH CARRY| Format : (Al [A] + data + [cy] Addressing : Immediate addressing Group : Arithmetic group Bytes : 2bytes Flags : All After execution: [A] = 5B H 7) SUB: [SUBTRACT REGISTER FROM ACCUMULATOR] Format : (Ale [A]-[r] Addressing: Register addressing Group : Arithmetic instructions group Bytes : 1 byte Flag : All Comment : The contents of register r are subtracted from the content of accumulator. The result is placed in accumulator. All the flags may be affected. Example: [A] =37H [C]=40H 5 Instruction : SUBC [C]:40H = 01000000 2’scomplement = 11000000 +{A]:37H = 0011 0112 (fo) 1111 0111 complement carry | 111110111 Result :[A] = F7H Flags : S = 1,Z=0,Ac=0, P =0, Cy=1 The result, as a negative number, will be in 2’s complement and thus the carry (Borrow) flag is set.‘TPS Computer Scien‘ 8) 9) 10) Instruction Set and Progres O! 8085; SUBM: [SUBTRACT MEMORY FROM ACCUMULATOR] fa] € IA] - (H-LI] Format : ‘Addressing: Register Indirect ‘Group Arithmetic Instruction Byte: 1 Flag: All : : Comment : The content of memory ocation, whose address we fe ae Pair is subtracted from the content of accumulator. The result is pla r. Example : [HL] = 2500 [2500] = 05H [A] =07 Instruction: SUBM ‘After execution : [A] = 02H DIATE FROM ACCUMULATOR] Gz SUI data : [SUBTRACT IMME! [A] < [A] - data Format: Addressing : Immediate addressing Group : Data transfer group Bytes : 2bytes All cond byte of the instruction is Flag: Comment : The 8-bit immediate data specified in the se subtracted from the content ‘of accumulator. Result is placed in accumulator. All the flags may be affected. Example : Let, [A] = 1FH Instruction: SUI1FH After execution : [A] = 00H SBB r: [SUBTRACT REGISTER AND BORROW FROM. ACCUMULATOR] [A] [A] - [a] -ICy] a Format : Addressing: Register addressing Group : Arithmetic group Bytes : 1 byte Flag: All oe 2 The contents of ——- rand carry bit are subtracted from the contents of . The result is placed in accumulator. All the fl banpl: tear e flags may be affected. [B] = 3F H [Cy] =01H Instruction : SBB B [B]=3F Borrow : +1 40H = 01000000 2’s complement of 40 Hmw) 12) 13) = ee) ion Set and Poor = 11000000 +IAl_ = 00110111 11110111 Complement carry ; 11110111 Result: IA] = F7H The borrow flag is set to indicate the result is in 20s comy : plement. SBB M: [SUBTRACT MEMORY CONTENT AND BORROW FROM CCUMULATOR] Format: [A] — [A] - [0SIILI] - [cy] Addressing: Register Indirect addressing Group : Arithmetic group Bytes : 1 byte Flag: All Comment : The contents of memory location whose address is stored in H-L pair along with carry bit are subtracted from the contents of accumulator. Result is placed in accumulator. All the flags may be affected. Example: Let [H-L] = 2500 H, [2500] = 05 H, [A] = 07 Hand [Cy] =0. Instruction : SBB M After execution : [A] = 02 H SBI data : [SUBTRACT IMMEDIATE WITH BORROW] Format ; [A] < [A] - data - [Cy] Addressing: Immediate addressing Group : Arithmetic group Bytes : 2 bytes Flag : All Comment : The 8-bit immediate data, specified in the second byte of instruction is subtracted along with the carry bit from the content of accumulator. The result is placed in accumulator. All the flags may be affected. Example: Let [A] = 32H, [Cy]=1H Instruction ; SBI 31H. After execution : [A] = 0 INR r: [INCREMENT REGISTER CONTENT BY 1] Format : [r] — [r] +1 Addressing: Register addressing Group : Arithmetic group Bytes : 1byte Flag: $,Z,P, Ac Comment : The contents of register r are incremented by one and the results are stored in the same place. All the flags except carry flag may be affected. The register r can be A, B,C, D, E, Hand L. Example : Let [B] = FFH Instruction: INRB—_[_[_[_—>_—_——_--- eau 14) 15) 16) After execution : [B] = 00H Flag :$=0,P-=0,Ac=0,Cy=0,2=1 INRM: [INCREMENT MEMORY CONTENT BY 1] Format : (0H) (L]) — (0H) LN + 1 ‘Addressing: Register indirect Group : Arithmetic instruction Byte: 1 byte Flag: S,Z, P, Ac except Cy Comment : The content of memory location whose address is stored in H-L register pair in i.e.stored on the same place. is incremented by one and result agai Example; [H-L] = 2500 H [2500] = 04 H Instruction : INRM After execution: [2500] = 05 H INX rp: [INCREMENT REGISTER PAIR BY 1] Format : [rp] [el then Z and Cy flags are reset Ther may be any one of the A, B,C,D, E, Hand 1 register Example : Let [A] = 15 H and [H] = 57 11 : Instruction ; CMP H After execution : Cy = 1,7, =9 CMP M:: [COMPARE MEMORY WITH ACCUMULATOR] Format : (Al - (1H-L]] Addressing : Register indirect addressing Group : Logical group Bytes : 1byte Flags: All Comment : This instruction compares the content of memory location whose address is stored in H-L pair with the content of accumulator by subtracting the content of memory location from the content of accumulator. The content of accumulator remains unchanged. The result of comparison is shown by setting the flags as below : (a) The zero flag is set to 1 if [A] = [[HIL]] (b) TheCy flag is set to 1 if [A] < [[H][L}]. (c) Both Cy and Z flags are reset if [A] > (THNIL]] CPI data : [COMPARE IMMEDIATE WITH ACCUMULATOR] Format : [A] - data Addressing : Immediate addressing Group : Logical group Bytes : 2 byte Flags : All Comment : This instruction compares the 8-bit immediate data, specified in the second byte of instruction, by subtracting it from the contents of accumulator. The content of accumulator remains unchanged. The result of comparison is shown by setting flags as : 1) If the contents of accumulator are equal to 8-bit immediate data, then zero flag is set. 2) _ If the contents of accumulator are less than the 8-bit immediate data, then carry flag is set. 3) Else, both flags are reset.13) 14) ap ‘CUMULATOR LEFT] RLC: [ROTATE AC Format : [Anvil & [An], [Aol < [Az], [Cyl & [Aa] ‘Addressing: __ Implied addressing Group : Logical group Bytes : 1byte On a ted to left by one bit position. The bi : tents of accumulator are rotated to ie! . The bit A, ee ieee in following figure : " ts stored in bit Ao as well as in carry flag, It is shown A, Ay Ay Az At Ao Example : Let [A] = 93 Hand [Cy] =0 Instruction : RLC Before instruction : Accumulator After execution : RLC E] Pte] cy Accumulator Thus [A] = 27 Hand Cy =1 RRC: [ROTATE ACCUMULATOR RIGHT] [Aa] © [Ansa], [Ar] © [Ad], [Cy] — [Aol (Mar. 2004, Format : Addressing : Implied addressing Group : Logical group Bytes : 1 byte Flag: cy one bit position. The bit A Comment : The contents of accumulator are rotated right by of accumulator is stored in the bit A7 as well as in carry flag. Only the Cy flag is aff The function of RRC is shown in the following figure. fected.7-eo Example: [A] = 83 H [Cy] = 0 St ant Programming of 8085 Ay A DonG Accumulator Y Instruction : RRC After execution : LE Topp py Accumulator Thus [A] = C1H, [Cy] =1 cy 15) RAL: [ROTATE ACCUMULATOR LEFT THROUGH CARRY] 16) Format : [Anal & [An], [Aol © [Cy], [Cy] — [Ay] Addressing: Implied addressing, Group : Logical group Bytes : 1 byte Flag: cy Comment : This instruction rotates the content of accumulator one position left through carry flag. The carry flag status is stored in bit AO of accumulator and the bit A7 of accumulator is stored in carry flag. The function of RAL is shown in following figure : A, 7 Ao cy Accumulator Example : Let [A] = 29 H, [cy] H Copoy Pot feyoy | Cy Accumulator y Instruction ; RAL b Db PEPpPEeypTE cy Accumulator Thus [A]=53H [Cy] =0 RAR : [ROTATE ACCUMULATOR RIGHT THROUGH. CARRY] (Or Format : [An] © [Ans], [Az] — [Cy], [Cy] — [Ad] Addressing: Implied addressing Group : Logical group Bytes : 1byte Flag : cy—_ accumulator are rotated to right by one bit Position f the : Comment : The contents of tus is stored in bit ‘A7 of accumulator and the bit The cary fg carry flag is affected o lowing figure. flag. through cary flag. The CO ry fla R is shown in the foll of accumulator is st le: Let [A] = 3B H, Example con cy Accumulator Instruction : RAR cy Accumulator Thus [A]=1DH [Cy]=1 (CMA: [COMPLEMENT THE ACCUMULATOR] Format : [A]CIA] Addressing: Implied addressing Group : Logical group Bytes : 1 byte Flag : None Comment : This instruction complements the content of accumulator. Result is placed in the accumulator. Example : Let, [A] = 3BH=00111011 Instruction : CMA After execution : [A] = 11000100 ie. [A]=C4H 18) CMC: [COMPLEMENT CARRY] Format : Icy] ICy] Group : Logical group Bytes : 1 byte Flag : cy Comment : The carry flag is comy ais aie ne plemented. No other flags are affected. Instruction : CMC After execution : [Cy] =0 H 19) STC: [SET CARRY] SEE) Format : [Cy]}<1 Addressing : Implied addressing 17)iter Science - IT oni res Compulet 252 _nstruction Set and Programming © —— Group : Logical group _ a Bytes: 1 byte Flag : cy wv) Dd 2 3) ‘omment : TRis i Comment : This instruction sets carry flag to 1. No other flags are affected Branching Group : yee —— JMP addr. : JUMP UNCONDITIONALLY] Format : [PC] — addr Addressing : Immediate addressing Group * Branching group Bytes : 3 bytes Flag: None Comment : The control is transferred iti location, whose corneas is specified in the instruction, unconditionally to the memory location, Jcondition addr. : [Conditional JUMP] Format > [PC] ~addr Addressing :~—sdAmmediate adressing Group : Branching group Bytes 3 bytes Flags 2 None In conditional jump instructions, the jump is taken only if the condition is true. The conditional jump instructions and conditions are as given below. i) JNZaddr —:_- Jump onnot zero (Z= 0) ii) JZaddr Jump on zero (Z = 1) iii) JNCaddr —_Jumponnotcarry (Cy= 0) iv) JCaddr Jump on carry (Cy =1) vy) JPOaddr =“ Jumpon odd parity (P = 0) vi) JPE addr : Jump oneven parity (P= 1) vii) JP addr : Jump on plus (6 = 0) viii) JM addr : Jump on minus (S=)) If the condition is satisfied, then only the address of memory location specified in the instruction is loaded in program counter. CALL addr. : [UNCONDITIONAL SUBROUTINE CALL] Format: [[SP]- 1] [PCu] [(sP]-21— Cu [sP] [SP] -2 [PC] — addr Addressing : Immediate addressing Group : Branching gfouP Bytes : 3 bytes11S Computer science - lt “_ 4) 5) 6) Comment : CALL instruction is used to call a subroutine unconditionally. Before 4, control is transferred to the subroutine, the address of next instruction to be executeg the main program is stored in the stack. The contents of SP are decremented by 2,7}, the program jumps to the subroutine whose starting address is specifieq in tg 5 instruction. Ccondition addr. : [Conditional CALL] Format: [[SP] - 1] — [PCu] [ISP] - 2] — [PCL [SP] — [SP] -2 [PC] «addr The conditional call instructions and conditions are listed below : i) CCaddr =: Callifcarry (Cy =1) ii) CNCaddr : Callifno carry (Cy =0) iti) CZaddr Call if zero (Z = 1) iv) CNZaddr Calll if no zero (Z = 0) v) CPaddr : Calif plus (S=0) vi) CMaddr : — Callif minus (S=1) vii) CPOaddr : Calif odd parity (P = 0) viii) CPEaddr : — Call if even parity (P = 1) RET : [RETURN FROM SUBROUTINE] Format: [PCL] < [[SP]], [PCH] < [[SP] + 1] [SP] < [SP] +2 Addressing: Register indirect 2 Group : Branching group Bytes : 1 byte Comment : The contents of memory location, whose address is specified in stack pointer are moved to the lower order byte of program counter. The content of the memory location whose address is one more than the content of SP, moved to the higher order byte of program counter. The contents of stack pointer are incremented by 2. Recondition : [Conditional RETURN] Format: [PCL] < [[SP]] [PCH] < [[SP] + 1] [SP] — [SP] +2 Addressing: Register Indirect Bytes : 1 Flag : None Comment : If the specified condition is true, the actions specified in RET are performed: Otherwise the control continues sequentially.Y aps Computer Science Tt 254 Instruction Set and Programming of 8085 opcode Description Flag RC Return on Carry cy=1 RNC Return with no carry Cy=0 RP Return on positive S=0 RM Return on minus Sai RPE Return on parityeven P=1 RPO Returfion parityodd = P=0 RZ Return on zero Z=1 RNZ Retum on no zero Z=0 7 RSTn: [RESTART] Format: [[SP] - 1] — [PCy] [ISP] - 2] — [PCL] [SP] < [SP]-2 [PC] — 8*(n) Addressing : Register Indirect Byte: 1 Flag: None Comment : Control is transferred to the instruction whose address is 8 times the content of n. These instructions are used with interrupts. Opcode Operand _ Restart addr. RST 0 0000 RST 1 0008 RST 2 0010 RST 3 0018 RST 4 0020 RST 5 0028 RST 6 0030 RST 7 0038 8) PCHL: [LOAD PROGRAM COUNTER WITH HL] Format : [PCy] < [A] [PC,] — [L] Addressing: Register addressing Group : Branching group Bytes : 1byte Flag: NoneeS ' —~ Comment : This instruction moves the content of register H to higher order byte a nt of register L to lower order byte of program counter. program counter and the conte: alent to one byte unconditional jump instruction, with iump This instruction is equiv: address. stored in H-L pair. Example ; Let, [H] = 25H and [L] = Instruction : PCHL- ‘After execution : [PC] = ‘After execution of PCHL instruction, eH pee eee eee 39H 2539 H the control will be transferred to memory locatio, V)___ Machine Control Group : A) Stack operation : 1) PUSH rp: [PUSH REGISTER PAIR ON STACK] tam Format: [[SP]- 1] — [th] [{SP]-2] — [nll [SP] — [SP] -2 Addressing : Register indirect addressing Bytes : I byte flags : None Comment : (a) The contents of the higher order register of register pair rp are moved to memory location, whose address is one less than the content of stack pointer. (b) The contents of the low order register of register pair rp are moved to the location whose address is two less than the content of stack pointer. (c) The stack pointer is decremented by two. rp may be any one of the B (B & C), D (D &E),H (H&L). Example: Let [SP] = D015 H, [B] = 25 Hand [C] = 55H Instruction : PUSH B After execution : [D014] = 25H [D013] = 55 H and [SP] = D013 H Stack sP> D013 55, D014 ) D015 x 2) PUSH PSW: [PUSH ACCUMULATOR AND FLAG REGISTER ON STACK] Format : [[SP] - 1] = fA} [ISP] - 2], — (Cyl. ISP] - 2], x3) 4) 15 Computer Science = a 2-56 Instruction Set and Programming, of 8085 a - UsP]- 21, < [PI], UISP}-2],-x, [ISP] -2], —[Acl, [IsP}-2], rrscompute Science - Il Instruction Set and Programming of 8085 Example : Let, [H] = 25 H and [L] = 59 H Instruction : SPHL After execution : [SP] = 2559 H B) In: ions : (I/O) 1) INport: [INPUT 8-BIT DATA FROM AN INPUT PORT TO ACCUMULATOR] Format: [A] & data ‘Addressing: Direct addressing Group : Machine (I/O) control group Bytes : 2bytes Flags : No flags are affected. Comment : When this instruction is executed, microprocessor sends 8-bit port address ‘on lower order address bus i.e. Ay to Ay. Then, the 8-bit data placed on the 8-bit bidirectional data bus by the specified port is moved to accumulator. eg.IN10H When this instruction is executed, 8-bit data is inputed from a port, whose address is 10H. 2) OUT port: [OUTPUT 8-BIT DATA FROM ACCUMULATOR TO AN OUTPUT PORT] Format : (data) [A] Addressing: Direct addressing Group : Machine (I/O) control group Bytes : 2bytes Flags : No flags are affected. Comment : When this instruction is executed, microprocessor sends 8-bit port address on the lower order address bus AD, to AD;. 8-bit data is then transferred from accumulator to selected port. Example : OUT 32H When this instruction is executed, microprocessor sends 8-bit data from accumulator to the port, whose address is 32 H. 3) _ EI: [ENABLE INTERRUPT] Group: Machine control group Bytes: 1byte Flag: None Comment : EI means Interrupt Enable. The interrupt system is enabled following the execution of the instruction next to El and all interrupts are enabled. 4) DI: [DISABLE INTERRUPT] Group: Machine control group Bytes: 1 byte Flag : None Comment : DI means disable interrupts. As soon as DI instruction is executed, the interrupt, system is disabled. Interrupts are not recognized during the DI instruction. —TPS Computer Science - I 5) 6) 259 Instruction Set and Programming of, HLT: [HALT AND ENTER WAIT STATE] Group: Machine control group Bytes: 1 byte Flag: None Comment : When HLT instruction is executed, the proceso is stopped. The regist and flags are unaffected. This instruction is used to stop MPU. It is waiting for peripheral device to finish its task and i t the processor. This is generally the la, instruction of our assembly language program. i 7 from Halt state. NOP: [NO OPERATION] Diz Group: Machine control group Bytes: 1 byte Flag: None Comment : When this instruction is executed, no operation is performed, only this instruction is fetched and decoded. This instruction do not affect flags or content of . time delay in a timing loop. RIM: [READ INTERRUPT MASK] Group: Machine control group Bytes: 1 byte Flag: None Comment : This is a multipurpose instruction used to read the status of interrupts 75, 6.5, 5.5 and read serial data input bit. The instruction loads eight bits in the’ accumulator with the following interpretations : D; Dg Ds Ds Ds Da D, Do 6] 15] LE] 7.346. Serial ips | Interrupt data bit masked if bit=1 Interrupts Interrupt enable pending if flip-flop is set bit=1 if bit = 1 Example : After the execution of instruction RIM, the acumulator contained 49H: Explain the accumulator contents. 1 [A]: 49 H- 010 90 10 0 ae : L RST 5.5 RST 7.5 is pending | eed Interrupt enable RST 7.5 and 65 flip-flop is set are enabled— 2-60 Instruction Set and Programming of 8085 95 Computer Science - I TT sIM: [SET INTERRUPT MASK] ® Group: Machine control group Bytes: byte Flag: None Comment : This is a multipurpose instruction and used to implement the 8085 interrupts (RST 7.5, 6.5 and 5.5) and serial data output. The instruction interrupts the accumulator contents as follows b, DB Dy DB, DB, bB, DB, Dv, Serial output data Masks interrupts ifD,=1 if bits = 1 Serial data enable Mask set 1= Enable enable if 0=Disable D,=1 SOD : Serial Output Data : Bit D7 of the accumulator is latched into the SOD output line and made available to a serial peripheral if bit Ds = 1. SDE : Serial Data Enable : If this bit = 1, it enables the serial output. To implement serial output, this bit needs to be enabled. XXX : Don’t Care R75 : Reset RST 7.5: If this bit = 1, RST 7.5 flip-flop is reset. This is an additional control to reset RST 7.5. MSE : Mask Set Enable : If this bit is high, it enables the functions of bits Dz, D1, Do. This is a master control over all the interrupt masking bits. If this bit is low, bits Dz, D; and Do do not have any effect on the masks. M7.5 : D2 = 0,RST7.5is enabled. = 1,RST7.5 is masked or disabled. M65 : Di = 0,RST65is enabled. = 1,RST 6.5 is masked or disabled. M55 : Do = 0,RST5.5is enabled. =_1,RST5.5 is masked or disabled.