Birla Institute of Technology and Science Pilani, Hyderabad Campus g) One 8255 is interfaced to 8086 processor.

o 8086 processor. Its registers are found to have

II Semester 2017-2018 addresses 0C0, 0C2,0C4,0C6. Why are they not consecutive ( i.e)
CS/ECE/EEE/INSTR F241 0C0,0C1,0C2,0C3
Microprocessor Programming and Interfacing h) What is “Daisy chain”? In what context it is used ?
Comprehensive Examination –part A (Closed book) ̅̅̅̅̅̅ and DT/R
i) What is the purpose of DEN ̅ signals of 8086?
Time: 90 min. Date:10.05.2018 MM: 60 j) When is AEN signal generated by 8237 during DMA operation?
(Note: Answer all the parts of questions TOGETHER, else answers will NOT be 2) What is the function of below program. What are the errors and correct them
evaluated). (Marks 5)
1) Answer in one or two lines in brief. (10X2=20 marks) MODEL TINY ADDTHEM PROC NEAR
a) List the input values (A,B,C,D) for which the LED does not glow. .CODE PUSH BP
.STARTUP MOV AX,[BP+2]
MOV AX,30 ADD AX,[BP+4]
MOV BX,40 RET 4
PUSH AX ADDTHEM ENDP
PUSH BX END
CALL ADDTHEM
.EXIT
;
;
3) An 8086 based system is interfaced to memory to read 16 bit data. What are the
b) What is the purpose of prefixing byte_ptr in ASM86 for certain contents on the databus when the processor is reading the variables px, py and
instructions? Explain with an example. pz during memory read cycles. List them in a table as below. (Marks-5).
c) During execution of an instruction a Divide by zero error occurred . During
same instruction execution an NMI occurred and INTR signal is raised. Variable D15-D8 D7-D0
What is the sequence in which the three interrupts are processed after
current instruction?
d) One RAM and one ROM device are interfaced to 8086 processor as below. .model tiny
What is the address range the ROM occupies? Org 2000h
Px db 3;
Py dw 2130h
EVEN
Pz dw 3456h

--
Mov al,px
Mov ax,py
Mov ax,pz

4) Write an equivalent ASM86 procedure for the given “c” function below. The
variable a,b are passed on stack to the procedure by the caller. The return value
is placed in AX register by the procedure.. (write the calling and called
program) (Marks-10)
e) Assume LODSB instruction is removed from the 8086 instruction set. Int Multiply (unsigned char a, unsigned char b)
Write ASM86 procedure to replace its functionality . {
f) What is segment over ride? Explain with an example. Return a*b;
 } h. 8086 relinquishes the bus after the current instruction cycle in
response to hold.
5) Match the following (Marks-5)

1 CX a Word multiply and word I/O

2 CL b Translate
3 DX c String operations and loops
4 BX d Variable shift and rotate
5 DI e Destination index for string operations

6) Fill up the blanks (Marks-7)

a. Assuming all the operations are done 16 bit wide, the number of
machine cycles needed to execute the instruction INC BytePtr
[BX][SI]4 is ___
b. The content of dx after executing below code is ______
.data
mesg1 db “hello!”
mesg2 db 0ah,“second message”
.code
lea dx, offset mesg2
end

c. The content in AX after execution of below code is _________

Mov al,37h
Add al,36h
AAA

d.The interrupt vector for INT 255 is located at ____

e.Binary equivalent of the Gray code 1101 is ____
f.If SS = 2344 H, DS = 4022H , BX = 0200H, BP = 1402H, SI =
4442H then the effective address generated by the instruction
MOV AL,5[SI][BP] is __
g. When a system is reset CS:IP will be set to ________
7) Set True or False (Marks-8)
a. EVEN directive makes memory access faster
b. We cannot interface an I/O device in the 20 bit address range of
8086.
c. During “hold” state of the processor, interrupts are not detected.
d. Strobed data transfers use hand shake signals
e. Parity encoding will not detect position of error.
f. Daisy chain is a method of software based priority arbitration
g. USES directive saves certain registers on stack .
 Birla Institute of Technology and Science Pilani, Hyderabad Campus 4. 8253 Mode 5 generates a pulse (strobe) after a count of N pulses when gate
II Semester 2017-2018 signal triggers positive. Design the same behavior using interrupts and 8255
CS/ECE/EEE/INSTR F241 interface and without using 8253. (10 marks)
Microprocessor Programming and Interfacing  Explain shortly the approach.
Comprehensive Examination part-B (Open book)  Define basic I/O interface to generate the signals
Time: 90 min. Date:10.04.2018 MM: 60  Define the data members.
------------------------------------------------------------------------------------------------------  Write detailed initialization and ISR as flow chart or pseudo logic.
Note:
 Answer all questions.
 Write in ASM-86 only when asked in the questions Clock
 Only printed books and data sheets allowed. The books should not contain
any hand written notes. Gate
4 3 2 1 0
1. Below circuit has two open collector NOR gates tied up to generate output
F. Derive the Boolean function for output F in terms of A,B,C,D (2 marks) Output(n=4)

Gate

4 3 2 4 3 2 1 0

Output(n=4)

2. The date, month and Year (last two digits only) have to be stored totally in
16 bits. Represent the bit wise structure. (3 marks) 5. The flow through a pipe is controlled by a rotating handle. When the handle
3. Design a functional block (using gates or any devices) which compares two is rotated clockwise by 3600 the valve is fully open. A system has to be
4 developed to monitor the valve opening in degrees. So a rotary encoder is
coupled to the wheel . The encoder has two outputs Φ1 and Φ2. When the
Compare Input Output encoder rotates clockwise, the outputs change one bit at a time in the
b
i 1 X<>Y Z=high impedance sequence 00->10->11->01->00 for each step it moves. The sequence is
t 1 X=Y Z=X reversed if it rotates anti-clockwise. The encoder produces 100 pulses for
0 Dont care Z=High impedance one degree of rotation. The system has to detect the rotation and display the
n valve opening in 0 to 360 degrees(only integer portion).
numbers (X and Y) and generates Z as per truth table. (Marks-5)

X
Comparator Z
Y Ф1

Compare

Ф2

Anti clk wise Clockwise

Problem:

a. Explain the strategy in brief. (Marks-4)

 b. Design the encoder and display interface . (Marks-4)
c. Define the data structure. (Marks-4)
d. Explain the interrupt scheme . Write the ISRs in pseudo language or
flow chart (Marks-4)
e. Write the main program in pseudo language or flow chart. (Marks-4)
6. An athletic track (100 meters race) has to be automated.
 The track has 8 lanes for the athletes to run.
 The system starts the race by generating short beep. The beep is triggered
manually when every thing is ready.
 When the athlete is starting he passes over a start foot switch (SFS)
which becomes ON when pressed by his foot. Similarly the race is finished
when the athlete passes over a Finish foot switch. (FFS) System senses the
foot switches for each lane to compute the time taken by each athlete to
reach the Finish line ,
 If the athlete starts before the beep, (sensed by start foot switch) , system
records as “foul” for the lane.
 If the athlete could not complete the race within 12 sec , system records as
“Not completed’ for the lane.
 The resolution of running time to be recorded is 10 msec.
Problem:
A microprocessor based system has to be designed to compute the
completion times of all athletes (or Foul/incomplete) . System has to store
the completion times of all channels.
a. Explain the strategy in brief by text and appropriate diagrams (4
marks)
b. Design the interface to capture the events. (4 marks)
c. Define the data to be stored and processed. (4 marks)
d. Write pseudo code for the main program and ISRs. (4+4 marks)