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Topic-II
8086 Microprocessor & it’s
Architecture
T1. Barry B. Brey, The Intel Microprocessors. Pearson, Eight Ed. 2009. Chapter 2
R1. Douglas V Hall, Microprocessor and Interfacing, TMH, Second Edition. Chapter 2
Lecture 5
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Segment Registers
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Stack Segment
The CPU use the stack for temporarily
storing important data. For example the
content of register that will be require
at later stage.
The stack grows down i.e. the data is
pushed onto the stack memory
locations with decreasing address.
When the data is required by CPU in
later stage they will be popped off from
the stack.
Microprocessor System Design 3-23
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Physical address calculation
• The total addressable memory size is 1Mega Byte memory.
•The complete 1MB memory is divided into 16 logical segments
and each segment contains 64Kbytes of memory.
•While addressing any location in the memory bank the physical
address is calculated from two parts ; the first is segment address
and the second is offset address.
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8086 Memory Address Space
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Physical address calculation
• At any given time the 8086 works with only four 64 KB
segments within this 1MB range.
• A 64 KB segment can be located anywhere within the 1 MB
space, but the address will always start at an address with zeros in
the lowest 4 bits.
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8086 Memory Address Space
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Physical address calculation
• This constraint was put on the location of segments so that it is
only necessary to store and manipulate 16- bit data .
• The part of the segment starting address that is stored in
segment registers is known as segment base address.
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Programmer’s model of 8086
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Segmentation
Physical address = (<segment> * 16) + <offset>
= Segment address will shift left bitwise 4 times
+ offset address
3-30
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Default 16-bit segment and offset
address combinations
SEGMENT OFFSET SPECIAL
PURPOSE
CS IP INSTRUCTION
ADDRESS
SS SP (or) BP STACK ADDRESS
DS BX, DI, SI, DATA ADDRESS
an 8-bit number,
16 bit number
ES DI STRING
for string Instructions DESTINATION
ADDRESS
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Programmer’s Model
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Segmentation
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Physical Address
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Advantage of Segmentation
• Allows the memory capacity to be 1MBytes although the
actual addresses to be handled are of 16-bit size.
• Allow the placing of code, data and stack portions of the
same program in different parts (segments) of memory, for
data and code protection
• Relocation: Permits a program and/or its data to be put into
different areas of memory each time the program is
executed.
• Program - Specify only offset
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Arithmetic Logic Unit (ALU)
A B F Y
n bits n bits
0 0 0 A+B
0 0 1 A -B
Carry
0 1 0 A -1
Y= 0 ? F 0 1 1 A and B
1 0 0 A or B
A>B?
1 0 1 not A
Y
Signal F control which function will be conducted by ALU.
Signal F is generated according to the current instruction.
Basic arithmetic operations: addition, subtraction,
Basic logic operations: and, or, xor, shifting,
3-36
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x86 -ISA
8086-80486 Programmer’s Model
BIU
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Memory Addressing
• Real
- Access only 1MB of memory
- Only 20 Address lines required.
• Protected
- support multitasking
- memory management protection enabled
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Programmer’s Model BIU
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Programmer’s Model- MPR
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End of Lecture 5
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