1

Design & Simulation

of a Double-Balanced Active Mixer
Salman Nezafati, Postgraduate Student,
and Abdollah Sabbaghi, Postgraduate Student

Abstract—In this paper, a CMOS down-conversion double- simpler as digital signal processing is replacing many analog
balanced mixer for a direct conversion radio receiver (DCR) building blocks such as modulators and demodulators [4].
application has been designed and simulated. The frequencies of Mixers perform frequency translation by multiplying two
the radio frequency (RF) signal and the local oscillator (LO) are
both 10 GHz and the channel bandwidth is 25 MHz. Simulation waveforms (and possibly their harmonics). As such, mixers
results of the designed mixer exhibit 10.75 dB of conversion gain, have three distinctly different ports. Figure 1 shows a generic
0.15 dBm of input-referred third-order intercept point (IIP3), 34 transceiver environment in which mixers are used. In the
dBm of input-referred second-order intercept point (IIP2), 46 receive path, the down-conversion mixer senses the RF signal
dB LO to RF port isolation , and 7 dB noise gure (NF) while at its RF port and the local oscillator waveform at its LO
consuming 1 mA from 1.8V supply voltage. All simulations have
been done using HSpice RF simulator and employing 0.18µm port. The output is called the IF port in a heterodyne RX or
CMOS technology. the baseband port in a direct-conversion RX. Similarly, in the
transmit path, the up-conversion mixer input sensing the IF or
Index Terms—CMOS Mixer, Down-Conversion, Double-
Balanced Mixer, CMOS RF, Hspice RF. the baseband signal is called the IF port or the baseband port,
and the output port is called the RF port. The input driven by
the LO is called the LO port [5].
I. I NTRODUCTION
S technology advances, the demand for compact, multi-
A functional, low-power wireless electronics is growing.
During the past decades, the size of the electronic systems
has changed from bulky units such as the first generation
analog cell phones to wireless devices of very small size.
Not only do these compact devices attract consumers, but
also reduce manufacturing costs. This trend will continue in
the foreseeable future as System-on-a-Chip (SoC) continues
to increase in complexity.
CMOS has been the dominant technology in digital appli-
cations due to its low-cost and high yield. It has also attracted Fig. 1: Role of mixers in a generic transceiver
microwave monolithic integrated circuit (MMIC) engineers to
this technology as an alternative to other, more expensive and Mixing requires a circuit with a nonlinear transfer function,
lower yield technologies, such as GaAs. Therefore CMOS since nonlinearity is fundamentally necessary to generate new
has been in constant development and imported into the frequencies. If an input RF signal and a local oscillator signal
RF/microwave analog realm. Many passive components such are passed through a system with a second-order nonlinearity,
as inductors and capacitors have been given much attention to the output signals will have components at the sum and
make them possible in CMOS. Furthermore, with the constant difference frequencies. A circuit realizing such nonlinearity
scaling of the transistor gate lengths, the frequency limit of the could be as simple as a diode followed by some filtering to
technology has been increasing and it is becoming the MMIC remove unwanted components. On the other hand, it could
technology of choice in the microwave range for small-signal be more complex; such as the double-balanced cross-coupled
applications [1-3]. circuit, commonly called the Gilbert cell. In an integrated
In a typical receiver architecture, a receiver is composed of circuit, the more complex structures are often preferred, since
building blocks such as low-noise amplifiers (LNA), mixers, extra transistors can be used with little extra cost but with
oscillators, and demodulators that are application specific. The improved performance [6].
characteristics of these building blocks are different in order to One of the simplest forms of a mixer is shown in Figure 2.
meet different standards such as GSM and WCDMA. Due to The input of the mixer is simply a gain stage like one that has
the advancement of digital hardware, receivers are becoming already been considered. The amplified current from the gain
stage is then passed into the switching stage. This stage steers
S. Nezafati and A. Sabbaghi are with the faculty of Electrical and Robotic the current to one side of the output or the other depending on
Engineering, Shahrood University of Technology, Shahrood, Semnan, Iran.
e-mail: [email protected] the value of V2 (this provides the nonlinearity just discussed).
e-mail: [email protected] If the control signal is assumed to be a periodic one, then
 2

this will have the effect of multiplying the current coming is entirely determined by the symmetry of the mixer circuit and
out of the gain stage by plus or minus one (a square wave). LO waveforms. The LO-IF feedthrough is benign because it
Multiplying a signal by another signal will cause the output to is heavily suppressed by the baseband low-pass filter.
have components at other frequencies. Thus, this can be used
to move the signal V1 from one frequency to another [6]. B. Gilbert Cell Operation
The most popular active, double balanced mixer topography
in RFIC design is the Gilbert Cell mixer, the circuit of which
is shown in Figure 3. This type of mixer exploits symmetry
to remove the unwanted RF & LO output signals from the IF
by cancellation.

VDD

RL1 RL2

Vout+ Vout-

CL

Fig. 2: Simple conceptual schematic of a mixer VLO+ M3 M4 M5 M6 VLO+

VLO-

This paper is organized in the following manner. Section II

Introduces the employed Gilbert cell circuit and design of its RS1 RS2
VRF+ M1 M2 VRF-
essential components. Section III demonstrates the simulation L1 L2
results for the designed double-balanced cross-coupled mixer.
Section IV summarizes the overall advantages and limitations Ib

of the presented down-conversion mixer and concludes the

paper.
Fig. 3: Schematic of a Gilbert cell
II. M IXER D ESIGN
The RF signal is applied to the transistors M1 & M2
A. Performance Parameters
which perform a voltage to current conversion. For correct
1) Noise and Linearity: In a receive chain, the input noise operation these devices should not be driven into triode and
of the mixer following the LNA is divided by the LNA therefore, signals considerably less than the 1dB compression
gain when referred to the RX input. Similarly, the IP3 of point should be used. Performance can be improved by adding
the mixer is scaled down by the LNA gain. The design degeneration resistors or inductors, on the source terminals
of down-conversion mixers therefore entails a compromise of M1 & M2. MOSFETs M3 to M6 form a multiplication
between the noise figure and the IP3 (or P1dB). In direct- function, multiplying the linear RF signal current from M1
conversion receivers, the IP2 of the LNA/mixer cascade must and M2 with the LO signal applied across M3 to M6 which
be maximized. provide the switching function. M1 and M2 provide +/- RF
2) Gain: Down-conversion mixers must provide sufficient current and M3 & M5 switch between them to provide the RF
gain to adequately suppress the noise contributed by subse- signal or the inverted RF signal to the left hand load. M4 &
quent stages. However, low supply voltages make it difficult M6 switch between them for the right hand load.
to achieve a gain of more than roughly 10 dB while retaining The major performance parameter for the mixer is conver-
linearity. The gain of mixers must be carefully defined to avoid sion gain (CG). It is a measure of the efficiency of the mixer.
confusion. The voltage conversion gain of a down-conversion CG is defined as the ratio of the desired IF output to the RF
mixer is given by the ratio of the rms voltage of the IF input. CG value is determined by the transconductance gm of
signal to the rms voltage of the RF signal. Note that these the transconductance stage transistors and is given by:
two signals are centered around two different frequencies.
The voltage conversion gain can be measured by applying 2
| AV | =
gm R L (1)
a sinusoid at ω RF and finding the amplitude of the down- π
converted component at ω I F . Where RL is the load resistance connected to the switching
3) Port-to-Port Feedthrough: Owing to device capaci- stage transistors.
tances, mixers suffer from unwanted coupling (feedthrough) Noise figure determines the operating signal range for the
from one port to another. The LO-RF feedthrough proves mixer. A Gilbert cell mixer is formed by an input transcon-
undesirable as it produces both offsets in the baseband and ductance stage (RF section), switches (LO section) and an
LO radiation from the antenna. Interestingly, this feedthrough output load. All the transistors that make up these functions
 3

contribute noise to the mixer. Therefore, the noise contribution with these voltages was insufficient. According to equation 6,
of the transconductance stage, switches and output load should the gain can be increased by decreasing the overdrive voltage
be included in the noise analysis of a Gilbert cell mixer. The of transconductance stage. VOD1 was set to 40mV.
total white noise at the output of a double-balanced Gilbert
cell mixer can be calculated using equation which is derived 4 Voma x
in [7]: AV ma x =
π VOD1
Voma x = VDD − VDmin (6)
2RL I √
2
= 8kT RL (1 + γ
Vn,o + γgm RL ) 2
πA VDmin = (VOD1 ) + (1 + )(VOD3 )
2 (2) 2
Vn
NF ≈ 1 + Based on table I, power consumption is not a crucial
4kT Rs ∆ f
requirement, therefore the bias current Ib was limitlessly set
Where, k is the Boltzmanns constant, T is the absolute to 1 mA. Maximum load resistance can be calculated using:
temperature, RL is the load resistor, γ is the channel noise
factor, I is the bias current in each side of the mixer, A is the Voma x
RLma x = (7)
amplitude of LO signal and gm is the transconductance of the I D1
RF input transistors at transconductance stage.
The final transistors dimensions and other component values
have been gathered in table II.
C. Design Procedure
According to the design criteria of the mixer, which has TABLE II: Circuit Components Specifications
been tabulated in table I, the design starts with the aim Transistors W L Component Value
of reaching the desired conversion gain. Before starting the M1 91.27um 0.18um R L1 3K Ω
calculations, it is vital to regard the following considerations: M2 91.27um 0.18um R L2 3K Ω
M3 48.42um 0.18um R S1 200 Ω
• Linearity of the circuit is highly dependent on M1 and
M4 48.42um 0.18um R S2 200 Ω
M2 transistors. Therefore, these transistors must always M5 48.42um 0.18um L S1 1n H
remain in saturation region. M6 48.42um 0.18um L S2 1n H
CL 0.5p F
VDS1 > VGS1 − VT H1 (3) Ib 1m A

Usually effective voltage of these transistors is set be-

tween 0.2V to 0.3V.
III. S IMULATION R ESAULTS
• As long as M3-M6 are all on, they all must remain in
saturation region, until one couple turns completely on All simulations have been conducted in HSPICERF A-
(e.g. M3 & M6) and the other one goes completely off 2008.03 simulator using TSMC 0.18µm Mixed-Signal Salicide
(e.g. M4 & M5). library.

VC M LO − VGS3 > VGS1 − VT H1 (4) A. Gain conversion

• Knowing the effective voltage and the current of a tran- The designed mixer has gone under transient analysis, in
sistor, assuming the minimum length of the technology, order to observe the differential output. The designed mixer is
the width of the transistors can be obtained. to be used in a direct conversion receiver and the IF frequency
in such receivers is zero, therefore it will be unattainable to
1 W spot the output. As a result, the RF frequency is set to 10.0125
ID = µ n Co x (VGS − VT H ) 2 (5)
2 L GHz rather than 10 GHz, which is based on half of the channel
bandwidth. So after mixing the RF signal with 10 GHz LO
TABLE I: Design Criteria of the Mixer signal, the IF output becomes 12.5 MHz. The result has been
Parameter Specification shown in figure 4.
RF frequency 10 GHz the obtained conversion gain is 10.75 dB.
LO frequency 10 GHz
Channel Bandwidth 25 MHz
B. Nosie Figure
Gain Conversion > 10 dB
Noise Figure (DSB) < 12 dB In order to calculate the noise figure, HBAC analysis has
LO, RF and IF isolations > 20 dB been utilized. HBAC analysis is similar to HB analysis and
IIP3 > -8 dBm can be used interchangeably when one of the signals is much
IIP2 > +25dBm
smaller than the other one. Here the RF signal is set to be an
VDD 1.8 V
Power Consumption as low as possible HBAC signal and the LO signal is set to be a HB tone.
As it can be seen in figure 5, the noise figure at 25 MHz is
As an initial assumption, the effective voltage of all transis- 7 dB. In low frequencies the flicker noise effect increases the
tors were assumed to be 0.2V. The calculated conversion gain noise figure.
 4

VDD

RL1 RL2

P2
Vout+
Vout-

CL

VLO+ M3 M4 M5 M6 VLO+

VLO-

P1 RS1
VRF+ VRF-
M1 M2
L1 L2

RS2
Ib
Fig. 4: Conversion Gain

ls
oo
dT
an
er
rit
ee
W P3 R2E1
Fr
w ith VLO+
itor
F Ed
PD
RP3 R1E1 E1
ill
PDF

R2E2
VLO-

R1E2 E2

DC

Fig. 5: Noise Figure Fig. 7: IIP3 Setup

ls
T oo
nd
C. IIP3 W
rit
er
a
D. IIP2
ee
Fr
w ith
dit
or
For measuring IIP3 of the designed mixer, two tone HB
DF
E To run the IIP2 measurement simulation, the previous setup
ll P
Fi
analysis has been done. Simulation setup of the IIP3 simula-
PD was employed. IIP2 can be calculated using:
tion and the defined ports are illustrated in figure 7.
After running the simulation, IIP3 can be calculated either
I I P2 = Pin + ∆P
using the output waveforms, which are shown in figure 6, or (9)
applying the following equation: ∆P = Pout − I M2

For the designed mixer, IIP2 equals 34 dBm.

∆P
I I P3 = Pin +
2 (8)
∆P = Pout − I M3 E. Isolation
To calculate the S-parameters of the presented three port
network, AC linear analysis is conducted. All port-to-port
isolations are above 20 dB, which is demanded in table I.
LO to RF port isolation at 10 GHz is 46 dB.

IV. C ONCLUSION

A CMOS Gilbert cell Mixer with input RF and LO fre-

quency of 10 GHz was designed in TSMC 0.18m CMOS
technology and simulated using HSPICE-RF simulator. The
mixer is operated at 1.8V power supply. All the requirements
are fulfilled for the circuit as expected and they improved in
performance. The measured parameters of the designed mixer
Fig. 6: IIP3 are appropriate for developing an RF Receiver Front End.
Table III represents the comparison between the simulated
Which results in 0.15 dBm. oo
ls outputs to the reference outputs.
dT
an
er
rit
W
ee
Fr
ith
rw
d ito
D FE
ll P
Fi
PD
 5

TABLE III: Comparison of Designed Mixer with other Mixers

Parameters [8] [9] [7] This work
RF frequency (GHz) 2.4 2.4 2.4 10
LO frequency (GHz) 2.25 2.25 2.25 10
Supply voltage (V) 1.8 1.8 1.8 1.8
Conversion gain (dB) 9.6 5.5 13.8 10.75
NF (dB) 9.4 20 15.5 7 @ 25MHz
Power Consumption (mW) 24.7 18 10 1.8
IIP3 (dBm) 15.7 9.2 -2 0.15
IIP2 (dBm) - - - 34
LO to RF Isolation (dB) - - - -46 @10GHz
Technology(ţm) 0.18 0.18 0.18 0.18

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Salman Nezafati received his B.S. degree in Elec-

tronic engineering from Ferdowsi University of
Mashhad (FUM), Mashhad, Iran in 2016. He is
currently a M.Sc. student in Shahrood University
of Technology (SUT). His research interests include
modeling, analysis and synthesis of microelectronic
circuits, energy harvesting and nanoelectronics.

Abdollah Sabbaghi received his B.S. degree in

Telecommunications engineering from Quchan Uni-
versity of Technology, Quchan, Iran in 2014. He
is now a M.S. student in Shahrood University of
Technology. His research interests include modeling,
analysis and synthesis of microelectronic circuits.