Assignment - 1 Name : UDATHA HARINATH Reg-no: 22BEC#254 1 Interface one gk RAM and two Lk ROMs 10 an ¢ bit ricroprae SSF with number of address lines 16 the starting address OF RAM and Rom are 00C00H and coooH re espectively A) Sbit datalines, 16 bit address lines —> 8085 enicroprocessor = 23 (13 address lines) 22! = 9" (19 address lines) Memor' ' Nee rapping: RAM $k = 239!0 ROM Uk - AisAyAg An AnAiAghg ArAcAsA, Ash, Ai Ay 0900/0 960500 0000 0000 = ooooH et COMO O} bea 1.2 eet | = IFFEH IMMONGIEAONONGnG) = © 00OQ ©6000 - coooH i heel ert ee = CREFH | Rom é 0000 2000 0000 =po00H ae! ee | > DFer A] | Chipselect | Ais —o z As. ae | eee | yo, ol. Ay ie Ae, Sw he TA ee——— | | 2. write asserbly Nanguage code in 8025 t0 implement the Following java code. Assume. Necessary registers for given Variables if (x23) 4 X=atb: a else Wrect: ete 5) sored) in vegiSier *¢) ‘0°18 stored in register ‘p’ | “CIS Stored in register 'E? | code: MOv AVC | MVT B o3H MP B TC X-LESS_tHAN_3 | IMP X.NOT_LESS_THAN_3 | XLLESS_THAN.3 + | MovAD ADD E MOV CA IMP ENDIF X_NOT_LESS_THAN-3 : MOV AD SUB E Mov CA ENDIF : HLT3 Write an assembly language code in 2085 10 find the Product Of twWO bit numbers . Assume necessary registers code : AL Let first muenber stored in register 'B' Second number stored in register ‘c’ result stored in p (high byte) and E (low byte) MULTIPLY Loop + NO_CARRY END MVT D, 00H MvT E, 00H MoV ALB ORA C J2 END MOV LC Moy AE ADD B Mov EA INC NO- CARRY INR D 1 DCRL INZ MULTIPLY _ Loop aaees lS Chr CY 4. write an assembly language Code in R085 to arvarge the Humbers in, ascending order. ASSUME neces 10 sary registers A. Lek AssUMe numbers are stored in memory loccitions Starting From speciPic address Say '4OOOH * code: UXT 1, HO00H | MVT BL0dH load starting address of Nurnbers + Tnitialize counter B por uier loop OUTER_LOOP : Mov cB PY Ps value toc for inner loop SINNER-LOoP Mov A,M Load current number into ‘A’ TNX SE PE UE to coin next number CMP > COMPAYE With Next Nuenber Jc NEXT - TRAcM, don’t swap JZ NEXT + TP they ave equal , don’t Swap MOV DA 2 Temporarily store Current Aurnber in D MOAT; Move) ae Next nunnber to A MOV 4D ~ Move the temp to NeXt Position DCX H ~ decrement HL to Point back original Position PIO MART Mou the next number 19 Current position TINDE t + Therernent HL 40 point next Number NEXT 2 DX H DCR INRZ TNNER_ Loop TNX H DCR B INZ OUTER LOOP Hr5. Design and analysis a ricvocorvolle instruction cycle. pipeline. to execute an embedded prograry which have tog instructions Each instracton has uniforen Speed period and has 5 pipeline. Stages in Follaving order - Tostruction Fetch (F), Pecode (D) , Execule (Ex) , Memory Access (MEM) and Register write Back (use) Ftaces 3 Cikcycles, Dtakes 2 cik.cycles, Ex takes 4 Clk cycles, MEM 4oK€S 3 cik cycles and register write back takes 9 clk cycles . Q) with necessary diagrany , calculate the, total no. of cik cycles that will take +o execute the Program A) let Foreich D> decode E> Execwe, M—\ memory Access RO Register write. Back Total mo of clk cycles required = 14+ (100-1)xy = 14+ 396 La ab) IP the microcontrolley is given a clock with input clock Frequency | 2GH2 What is the maximurn clock Frequency with which the microcontroller can Operate 2 | AL WERT F asop = fine | ™AX diPP blLv tw instruction CIk cycles. =|" = OS GHZ | | ©) Telthe instruction pipeline is flushed after every Lio instructions , calculate the total no.of clock cycles taken, uptO 4O Instructions & a then flushed A) 0.08 clk cycles for 140 instructions = y+ (40-1) xy = 130 10. OF clk CYCleS for next 40 instruction = 14-+(4O-DXx4 = 170 0. OF clk cycles for last 20 instruction = 14+(20-N)xy = 4g Total clk cycles required = '#0+170 +90 | = 430| d) Th order 40 increase the microcontroller Operating frequency, a register is placed iN between the pipeline where it choulg be Placed , and after placing , what iS the New rmaxirnucn Operating Frequency and total number of clk cycles 4he Prograrn will take without Flushing ? A) Register would ideally be placed at the bottleneck Stage to break it down and reduce the time Per Stage . SiMe the execute stage, 1S the longest (4 cycles) » Placing a register in between) ihe execute, Stage could Potentially split the execution cycles each. B | len | edjealealm| Mim] [a FEMI | Ex2| Eva MI MIMIR R at ee IMim [Mf RTR “Total No.of Clk cycles required = Iyt (100-1)x 3, Se Sh IntO twO stages of 2 So or)6 Design and analyse a microcontroller instruction cycle pipeline. tO execute an embedded program which has oo instructions Each instruction has 4 pipeline Stages = Instruction Fetch (IF), Decode (1p), Execute (Ex), Mernory Access (MEM). F takes 1 clk Mles, decode take \ ck cycles, Ex takes Ui dk cles and mem takes 3 clk cycles, 4) with necessary diagrams, calculate the total no of clk cycles that will take to execute the Progrann 2 let Fetth-F execute - Ex Petode -D Memory Access — M Soon ~ Total no. of clk cycles required a + (600-1)x ty 724 05) ) TF the microcontroller is given a clk Period of lons_ what is the maximum VK Frequency with which the micro controller Can operate 7 | A) gieN T= Ions faemaximum clocks frequency microcontvoller can operate. = f, ee ee max di Pe blus 2 StiMstrUCtions: = 81 = 9.025 quz Size Mhz ¢) Show the scheduling of pipeline stages with diagrams , if the Pipeline is flushed for 100 instructions . A) using diagrarn in next page. | Pipeline is flushed for too instructions *. 600 = 6 sets 100 No.of clk cycles required for Executing 100 insiructions, = 44(100- 1) xy = 44396 &) Hos ~ Total na.of clk Cycles required to complete 600 instructions Or execute am program = 6x4Os = 2430Soon ex |&x [ex | Ex]M|M|M] Fio{ | E DB Ex|EIEX Ex]mim[M =d) Suppose the execute stage take 5 clk cycles for first 100 instructions (11-1100), 6 clk cycles for First 100 instructions (I101-1200), Ue cle cycles For first 100 instructions (120) - 1300) # clk cycles for first 100 IMSPUCHON (1301-1400), 4 CIK Cycles for 100 instructions (1409-1500) And 5 clk cycles for first 100 instructions ( 150! -1600) A) for First (11-1 100) instructions ERT ete BETTS Exlex/Exlexfex{Mimlm eee x NO.OF clk cycles requived = 10+(100-1)x5 mee Ont for Next (now - 1200) Instructions [FIDy Py F |pJ D eS nN & = Be ade Ex[MIM[M] NO.OF clk cycles Yequired a RX 6x100 600 rtTn dhe same way for Next (I201- 1300) instructions MO-OF clk cycles required = 4X100 = Yoo for Next (1301-1400) instructions NO.OF Ck cycles required = 4x100 * 400 for Next (1401 - 1500) instructions NO-CF clk cycles required = 4X100 = 400 for Next (igoi- 1600) instructions NO oF clk cycles required = sxi99 = 500 “Total no. of clk cycles required = 505+ 6004400 + 4004400 +500 3105,