1 /**

2 * @file xmc_bccu.c
3 * @date 2019-12-16
4 *
5 * @cond
6 *****************************************************************************
7 * XMClib v2.2.0 - XMC Peripheral Driver Library
8 *
9 * Copyright (c) 2015-2020, Infineon Technologies AG
10 * All rights reserved.
11 *
12 * Boost Software License - Version 1.0 - August 17th, 2003
13 *
14 * Permission is hereby granted, free of charge, to any person or organization
15 * obtaining a copy of the software and accompanying documentation covered by
16 * this license (the "Software") to use, reproduce, display, distribute,
17 * execute, and transmit the Software, and to prepare derivative works of the
18 * Software, and to permit third-parties to whom the Software is furnished to
19 * do so, all subject to the following:
20 *
21 * The copyright notices in the Software and this entire statement, including
22 * the above license grant, this restriction and the following disclaimer,
23 * must be included in all copies of the Software, in whole or in part, and
24 * all derivative works of the Software, unless such copies or derivative
25 * works are solely in the form of machine-executable object code generated by
26 * a source language processor.
27 *
28 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
29 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
30 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
31 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
32 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
33 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
34 * DEALINGS IN THE SOFTWARE.
35 *
36 * To improve the quality of the software, users are encouraged to share
37 * modifications, enhancements or bug fixes with Infineon Technologies AG
38 * at [email protected].
39 *****************************************************************************
40 *
41 * Change History
42 * --------------
43 *
44 * 2015-02-19:
45 * - Initial draft <br>
46 *
47 * 2015-05-08:
48 * - Minor bug fixes in following APIs: XMC_BCCU_ConcurrentStartDimming(),
XMC_BCCU_ConcurrentAbortDimming(),
49 * XMC_BCCU_SetGlobalDimmingLevel() <br>
50 *
51 * 2015-06-20:
52 * - Removed version macros and declaration of GetDriverVersion API
53 *
54 * 2019-12-16:
55 * - Fix including files following the convention: angle brackets are used for
standard includes and double quotes for everything else.
56 *
57 * <b>Detailed description of file:</b><br>
58 * APIs for the functional blocks of BCCU have been defined:<br>
59 * -- GLOBAL configuration <br>
60 * -- Clock configuration, Function/Event configuration, Interrupt configuration <br>
61 *
62 * @endcond
63 *
64 */
65
66 /*************************************************************************************
********************************
67 * HEADER FILES
68
*************************************************************************************
*******************************/
 69 #include "xmc_bccu.h"
70
71 #if defined(BCCU0)
72 #include "xmc_scu.h"
73
74 /*************************************************************************************
********************************
75 * MACROS
76
*************************************************************************************
*******************************/
77 #define XMC_BCCU_NO_OF_CHANNELS (9U)
78 #define XMC_BCCU_CHANNEL_MASK ((0x1 << XMC_BCCU_NO_OF_CHANNELS)-1)
79 #define XMC_BCCU_NO_OF_DIM_ENGINE (3U)
80 #define XMC_BCCU_DIM_ENGINE_MASK (((0x1 << XMC_BCCU_NO_OF_DIM_ENGINE)-1))
81
82 /*************************************************************************************
********************************
83 * ENUMS
84
*************************************************************************************
*******************************/
85
86 /*************************************************************************************
********************************
87 * DATA STRUCTURES
88
*************************************************************************************
*******************************/
89
90 /*************************************************************************************
********************************
91 * GLOBAL DATA
92
*************************************************************************************
*******************************/
93
94 /*************************************************************************************
********************************
95 * LOCAL/UTILITY ROUTINES
96
*************************************************************************************
*******************************/
97
98 /*************************************************************************************
********************************
99 * API IMPLEMENTATION
100
*************************************************************************************
*******************************/
101
102 /*
103 * API to initialise the global resources of a BCCU module
104 */
105 void XMC_BCCU_GlobalInit(XMC_BCCU_t *const bccu, const XMC_BCCU_GLOBAL_CONFIG_t *const
config)
106 {
107 XMC_SCU_CLOCK_UngatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_BCCU0);
108
109 bccu->GLOBCON = config->globcon;
110
111 bccu->GLOBCLK = config->globclk;
112 bccu->GLOBDIM = config->global_dimlevel;
113
114 }
115
116 /*
117 * API to configure the global trigger mode & delay of a BCCU module
118 */
119 void XMC_BCCU_ConfigGlobalTrigger(XMC_BCCU_t *const bccu, XMC_BCCU_TRIGMODE_t mode,
XMC_BCCU_TRIGDELAY_t delay)
120 {
121 bccu->GLOBCON &= ~(uint32_t)(BCCU_GLOBCON_TM_Msk | BCCU_GLOBCON_TRDEL_Msk);
122 bccu->GLOBCON |= ((uint32_t)mode | ((uint32_t)delay << BCCU_GLOBCON_TRDEL_Pos));
123 }
124
125 /*
126 * API to configure the trap input selection of a BCCU module
127 */
128 void XMC_BCCU_SelectTrapInput (XMC_BCCU_t *const bccu, XMC_BCCU_CH_TRAP_IN_t input)
129 {
130 bccu->GLOBCON &= ~(uint32_t)(BCCU_GLOBCON_TRAPIS_Msk);
131 bccu->GLOBCON |= ((uint32_t)input << BCCU_GLOBCON_TRAPIS_Pos);
132 }
133
134 /*
135 * API to configure the trap edge selection of a BCCU module
136 */
137 void XMC_BCCU_SetTrapEdge (XMC_BCCU_t *const bccu, XMC_BCCU_CH_TRAP_EDGE_t edge)
138 {
139 bccu->GLOBCON &= ~(uint32_t)(BCCU_GLOBCON_TRAPED_Msk);
140 bccu->GLOBCON |= ((uint32_t)edge << BCCU_GLOBCON_TRAPED_Pos);
141 }
142
143 /*
144 * API to configure the suspend mode of a BCCU module
145 */
146 void XMC_BCCU_ConfigSuspendMode (XMC_BCCU_t *const bccu, XMC_BCCU_SUSPEND_MODE_t mode)
147 {
148 bccu->GLOBCON &= ~(uint32_t)(BCCU_GLOBCON_SUSCFG_Msk);
149 bccu->GLOBCON |= ((uint32_t)mode << BCCU_GLOBCON_SUSCFG_Pos);
150 }
151
152 /*
153 * API to configure number of consecutive zeroes allowed at modulator output (flicker
watch-dog number)
154 */
155 void XMC_BCCU_SetFlickerWDThreshold (XMC_BCCU_t *const bccu, uint32_t threshold_no)
156 {
157 XMC_ASSERT("XMC_BCCU_SetFlickerWDThreshold: Invalid threshold no", (threshold_no <=
BCCU_GLOBCON_WDMBN_Msk));
158
159 bccu->GLOBCON &= ~(uint32_t)(BCCU_GLOBCON_WDMBN_Msk);
160 bccu->GLOBCON |= (uint32_t)(threshold_no << BCCU_GLOBCON_WDMBN_Pos);
161 }
162
163 /*
164 * API to configure the fast clock prescaler factor of a BCCU module
165 */
166 void XMC_BCCU_SetFastClockPrescaler (XMC_BCCU_t *const bccu, uint32_t div)
167 {
168 XMC_ASSERT("XMC_BCCU_SetFastClockPrescaler: Invalid divider value", (div <=
BCCU_GLOBCLK_FCLK_PS_Msk));
169
170 bccu->GLOBCLK &= ~(uint32_t)(BCCU_GLOBCLK_FCLK_PS_Msk);
171 bccu->GLOBCLK |= div;
172
173 }
174
175 /*
176 * API to configure the dimmer clock prescaler factor of a BCCU module
177 */
178 void XMC_BCCU_SetDimClockPrescaler (XMC_BCCU_t *const bccu, uint32_t div)
179 {
180 XMC_ASSERT("XMC_BCCU_SetDimClockPrescaler: Invalid divider value", (div <=
BCCU_GLOBCLK_DCLK_PS_Msk));
181
182 bccu->GLOBCLK &= ~(uint32_t)(BCCU_GLOBCLK_DCLK_PS_Msk);
183 bccu->GLOBCLK |= (uint32_t)(div << BCCU_GLOBCLK_DCLK_PS_Pos);
184
185 }
186
187 /*
188 * API to configure the modulator output (bit-time) clock prescaler factor of a BCCU
module
189 */
190 void XMC_BCCU_SelectBitClock (XMC_BCCU_t *const bccu, XMC_BCCU_BCLK_MODE_t div)
191 {
192 bccu->GLOBCLK &= ~(uint32_t)(BCCU_GLOBCLK_BCS_Msk);
193 bccu->GLOBCLK |= ((uint32_t)div << BCCU_GLOBCLK_BCS_Pos);
194 }
195
196 /*
197 * API to enable the channels at the same time
198 */
199 void XMC_BCCU_ConcurrentEnableChannels (XMC_BCCU_t *const bccu, uint32_t mask)
200 {
201 XMC_ASSERT("XMC_BCCU_ConcurrentEnableChannels: Invalid channel mask", (mask <=
XMC_BCCU_CHANNEL_MASK));
202
203 bccu->CHEN |= mask;
204 }
205
206 /*
207 * API to disable the channels at the same time
208 */
209 void XMC_BCCU_ConcurrentDisableChannels (XMC_BCCU_t *const bccu, uint32_t mask)
210 {
211 XMC_ASSERT("XMC_BCCU_ConcurrentDisableChannels: Invalid channel mask", (mask <=
XMC_BCCU_CHANNEL_MASK));
212 bccu->CHEN &= ~(uint32_t)(mask);
213 }
214
215 /*
216 * API to set the channel's output passive levels at the same time
217 */
218 void XMC_BCCU_ConcurrentSetOutputPassiveLevel(XMC_BCCU_t *const bccu, uint32_t
chan_mask, XMC_BCCU_CH_ACTIVE_LEVEL_t level)
219 {
220 XMC_ASSERT("XMC_BCCU_ConcurrentSetOutputPassiveLevel: Invalid channel mask", (
chan_mask <= XMC_BCCU_CHANNEL_MASK));
221
222 bccu->CHOCON &= ~(uint32_t)(chan_mask);
223 bccu->CHOCON |= (chan_mask * (uint32_t)level);
224 }
225
226 /*
227 * API to enable the various types of traps at the same time
228 */
229 void XMC_BCCU_ConcurrentEnableTrap (XMC_BCCU_t *const bccu, uint32_t mask)
230 {
231 XMC_ASSERT("XMC_BCCU_ConcurrentEnableTrap: Invalid channel mask", (mask <=
XMC_BCCU_CHANNEL_MASK));
232
233 bccu->CHOCON |= (uint32_t)(mask << BCCU_CHOCON_CH0TPE_Pos);
234 }
235
236 /*
237 * API to disable the various types of traps at the same time
238 */
239 void XMC_BCCU_ConcurrentDisableTrap (XMC_BCCU_t *const bccu, uint32_t mask)
240 {
241 XMC_ASSERT("XMC_BCCU_ConcurrentDisableTrap: Invalid channel mask", (mask <=
XMC_BCCU_CHANNEL_MASK));
242
243 bccu->CHOCON &= ~(uint32_t)(mask << BCCU_CHOCON_CH0TPE_Pos);
244 }
245
246 /*
247 * API to configure trigger mode and trigger delay at the same time, and also
configure the channel enable
248 */
249 void XMC_BCCU_ConcurrentConfigTrigger (XMC_BCCU_t *const bccu, XMC_BCCU_TRIG_CONFIG_t
*trig)
250 {
251 uint32_t reg;
252
253 XMC_ASSERT("XMC_BCCU_ConcurrentConfigTrigger: Invalid channel mask", (trig->
mask_chans <= XMC_BCCU_CHANNEL_MASK));
254
255 bccu->GLOBCON &= ~(uint32_t)(BCCU_GLOBCON_TM_Msk | BCCU_GLOBCON_TRDEL_Msk);
256 bccu->GLOBCON |= ((uint32_t)trig->mode | ((uint32_t)trig->delay <<
BCCU_GLOBCON_TRDEL_Pos));
257 reg = 0U;
258 reg |= trig->mask_chans;
259 reg |= ((uint32_t)trig->mask_trig_lines << BCCU_CHTRIG_TOS0_Pos);
260 bccu->CHTRIG = reg;
261 }
262
263 /*
264 * API to start the linear walk of the channels to change towards target intensity at
the same time
265 */
266 void XMC_BCCU_ConcurrentStartLinearWalk (XMC_BCCU_t *const bccu, uint32_t mask)
267 {
268 XMC_ASSERT("XMC_BCCU_ConcurrentStartLinearWalk: Invalid channel mask", (mask <=
XMC_BCCU_CHANNEL_MASK));
269
270 bccu->CHSTRCON |= (uint32_t)(mask);
271 }
272
273 /*
274 * API to abort the linear walk of the channels at the same time
275 */
276 void XMC_BCCU_ConcurrentAbortLinearWalk (XMC_BCCU_t *const bccu, uint32_t mask)
277 {
278 XMC_ASSERT("XMC_BCCU_ConcurrentAbortLinearWalk: Invalid channel mask", (mask <=
XMC_BCCU_CHANNEL_MASK));
279
280 bccu->CHSTRCON |= (uint32_t)(mask << BCCU_CHSTRCON_CH0A_Pos);
281 }
282
283 /*
284 * API to enable the dimming engines at the same time
285 */
286 void XMC_BCCU_ConcurrentEnableDimmingEngine (XMC_BCCU_t *const bccu, uint32_t mask)
287 {
288 XMC_ASSERT("XMC_BCCU_ConcurrentEnableDimmingEngine: Invalid dimming engine mask", (
mask <= XMC_BCCU_DIM_ENGINE_MASK));
289
290 bccu->DEEN = (uint32_t)(mask);
291 }
292
293 /*
294 * API to enable the dimming engines at the same time
295 */
296 void XMC_BCCU_ConcurrentDisableDimmingEngine (XMC_BCCU_t *const bccu, uint32_t mask)
297 {
298 XMC_ASSERT("XMC_BCCU_ConcurrentDisableDimmingEngine: Invalid dimming engine mask", (
mask <= XMC_BCCU_DIM_ENGINE_MASK));
299
300 bccu->DEEN &= ~(uint32_t)(mask);
301 }
302
303 /*
304 * API to start the dimming engines at the same time to change towards target dim
level
305 */
306 void XMC_BCCU_ConcurrentStartDimming (XMC_BCCU_t *const bccu, uint32_t mask)
307 {
308 XMC_ASSERT("XMC_BCCU_ConcurrentStartDimming: Invalid dimming engine mask", (mask <=
XMC_BCCU_DIM_ENGINE_MASK));
309
310 bccu->DESTRCON = (uint32_t)(mask);
311 }
312
313 /*
314 * API to abort the dimming engines at the same time
315 */
316 void XMC_BCCU_ConcurrentAbortDimming (XMC_BCCU_t *const bccu, uint32_t mask)
317 {
318 XMC_ASSERT("XMC_BCCU_ConcurrentAbortDimming: Invalid dimming engine mask", (mask <=
 XMC_BCCU_DIM_ENGINE_MASK));
319
320 bccu->DESTRCON = (uint32_t)(mask << BCCU_DESTRCON_DE0A_Pos);
321 }
322
323 /*
324 * API to configure the dim level of a dimming engine
325 */
326 void XMC_BCCU_SetGlobalDimmingLevel (XMC_BCCU_t *const bccu, uint32_t level)
327 {
328 XMC_ASSERT("XMC_BCCU_SetGlobalDimmingLevel: Invalid global dimming level", (level <=
BCCU_GLOBDIM_GLOBDIM_Msk));
329
330 bccu->GLOBDIM = level;
331 }
332
333 /*
334 * API to enable a specific channel
335 */
336 void XMC_BCCU_EnableChannel (XMC_BCCU_t *const bccu, uint32_t chan_no)
337 {
338 XMC_ASSERT("XMC_BCCU_EnableChannel: Invalid channel number", (chan_no <= (
XMC_BCCU_NO_OF_CHANNELS - 1)));
339
340 bccu->CHEN |= (uint32_t)(BCCU_CHEN_ECH0_Msk << chan_no);
341 }
342
343 /*
344 * API to disable a specific channel
345 */
346 void XMC_BCCU_DisableChannel (XMC_BCCU_t *const bccu, uint32_t chan_no)
347 {
348 XMC_ASSERT("XMC_BCCU_DisableChannel: Invalid channel number", (chan_no <= (
XMC_BCCU_NO_OF_CHANNELS - 1)));
349
350 bccu->CHEN &= ~(uint32_t)(BCCU_CHEN_ECH0_Msk << chan_no);
351 }
352
353 /*
354 * API to set the specific channel's passive level
355 */
356 void XMC_BCCU_SetOutputPassiveLevel(XMC_BCCU_t *const bccu, uint32_t chan_no,
XMC_BCCU_CH_ACTIVE_LEVEL_t level)
357 {
358 XMC_ASSERT("XMC_BCCU_SetOutputPassiveLevel: Invalid channel number", (chan_no <= (
XMC_BCCU_NO_OF_CHANNELS - 1)));
359
360 bccu->CHOCON |= ((uint32_t)level << chan_no);
361 }
362
363 /*
364 * API to enable the specific channel trap
365 */
366 void XMC_BCCU_EnableTrap (XMC_BCCU_t *const bccu, uint32_t chan_no)
367 {
368 XMC_ASSERT("XMC_BCCU_EnableTrap: Invalid channel number", (chan_no <= (
XMC_BCCU_NO_OF_CHANNELS - 1)));
369
370 bccu->CHOCON |= (uint32_t)(BCCU_CHOCON_CH0TPE_Msk << chan_no);
371 }
372
373 /*
374 * API to disable the specific channel trap
375 */
376 void XMC_BCCU_DisableTrap (XMC_BCCU_t *const bccu, uint32_t chan_no)
377 {
378 XMC_ASSERT("XMC_BCCU_DisableTrap: Invalid channel number", (chan_no <= (
XMC_BCCU_NO_OF_CHANNELS - 1)));
379
380 bccu->CHOCON &= ~(uint32_t)(BCCU_CHOCON_CH0TPE_Msk << chan_no);
381 }
382
383 /*
384 * API to configure specific channel trigger enable and trigger line.
385 */
386 void XMC_BCCU_EnableChannelTrigger (XMC_BCCU_t *const bccu, uint32_t chan_no,
XMC_BCCU_CH_TRIGOUT_t trig_line)
387 {
388 uint32_t reg;
389 XMC_ASSERT("XMC_BCCU_EnableChannelTrigger: Invalid channel number", (chan_no <= (
XMC_BCCU_NO_OF_CHANNELS - 1)));
390
391 bccu->CHTRIG &= ~(uint32_t)(BCCU_CHTRIG_TOS0_Msk << chan_no);
392 reg = (uint32_t)(BCCU_CHTRIG_ET0_Msk << chan_no);
393 reg |= ((uint32_t)trig_line << (BCCU_CHTRIG_TOS0_Pos + chan_no));
394 bccu->CHTRIG |= reg;
395 }
396
397 /*
398 * API to disable specific channel
399 */
400 void XMC_BCCU_DisableChannelTrigger (XMC_BCCU_t *const bccu, uint32_t chan_no)
401 {
402 XMC_ASSERT("XMC_BCCU_DisableChannelTrigger: Invalid channel number", (chan_no <= (
XMC_BCCU_NO_OF_CHANNELS - 1)));
403
404 bccu->CHTRIG &= ~(uint32_t)(BCCU_CHTRIG_ET0_Msk << chan_no);
405 }
406
407 /*
408 * API to initialise the channel of a BCCU module
409 */
410 void XMC_BCCU_CH_Init (XMC_BCCU_CH_t *const channel, const XMC_BCCU_CH_CONFIG_t *const
config)
411 {
412 channel->CHCONFIG = config->chconfig;
413
414 channel->PKCMP = config->pkcmp;
415
416 channel->PKCNTR = config->pkcntr;
417 }
418
419 /*
420 * API to configure channel trigger edge and force trigger edge
421 */
422 void XMC_BCCU_CH_ConfigTrigger (XMC_BCCU_CH_t *const channel, XMC_BCCU_CH_TRIG_EDGE_t
edge, uint32_t force_trig_en)
423 {
424 uint32_t reg;
425 channel->CHCONFIG &= ~(uint32_t)(BCCU_CH_CHCONFIG_TRED_Msk |
BCCU_CH_CHCONFIG_ENFT_Msk);
426
427 reg = ((uint32_t)edge << BCCU_CH_CHCONFIG_TRED_Pos);
428 reg |= (uint32_t)(force_trig_en << BCCU_CH_CHCONFIG_ENFT_Pos);
429 channel->CHCONFIG |= reg;
430 }
431
432 /*
433 * API to configure the linear walker clock prescaler factor of a BCCU channel
434 */
435 void XMC_BCCU_CH_SetLinearWalkPrescaler (XMC_BCCU_CH_t *const channel, uint32_t
clk_div)
436 {
437 channel->CHCONFIG &= ~(uint32_t)(BCCU_CH_CHCONFIG_LINPRES_Msk);
438 channel->CHCONFIG |= (uint32_t)(clk_div << BCCU_CH_CHCONFIG_LINPRES_Pos);
439 }
440
441 /*
442 * API to set channel target intensity
443 */
444 void XMC_BCCU_CH_SetTargetIntensity (XMC_BCCU_CH_t *const channel, uint32_t ch_int)
445 {
446 channel->INTS = ch_int;
447 }
448
449 /*
450 * API to retrieve the channel actual intensity
451 */
452 uint32_t XMC_BCCU_CH_ReadIntensity (XMC_BCCU_CH_t *const channel)
453 {
454 return (uint32_t)(channel->INT &BCCU_CH_INT_CHINT_Msk);
455 }
456
457 /*
458 * API to enable packer. Also configures packer threshold, off-time and on-time
compare levels
459 */
460 void XMC_BCCU_CH_EnablePacker (XMC_BCCU_CH_t *const channel, uint32_t thresh, uint32_t
off_comp, uint32_t on_comp)
461 {
462 channel->CHCONFIG &= ~(uint32_t)(BCCU_CH_CHCONFIG_PEN_Msk |
BCCU_CH_CHCONFIG_PKTH_Msk);
463 channel->CHCONFIG |= thresh;
464 channel->PKCMP = (off_comp | (uint32_t)(on_comp << BCCU_CH_PKCMP_ONCMP_Pos));
465 channel->CHCONFIG |= (uint32_t)BCCU_CH_CHCONFIG_PEN_Msk;
466 }
467
468 /*
469 * API to configure packer threshold
470 */
471 void XMC_BCCU_CH_SetPackerThreshold (XMC_BCCU_CH_t *const channel, uint32_t val)
472 {
473 channel->CHCONFIG &= ~(uint32_t)(BCCU_CH_CHCONFIG_PKTH_Msk);
474 channel->CHCONFIG |= val;
475 }
476
477 /*
478 * API to configure packer off-time compare level
479 */
480 void XMC_BCCU_CH_SetPackerOffCompare (XMC_BCCU_CH_t *const channel, uint32_t level)
481 {
482 channel->PKCMP &= ~(uint32_t)(BCCU_CH_PKCMP_OFFCMP_Msk);
483 channel->PKCMP |= level;
484 }
485
486 /*
487 * API to configure packer on-time compare level.
488 */
489 void XMC_BCCU_CH_SetPackerOnCompare (XMC_BCCU_CH_t *const channel, uint32_t level)
490 {
491 channel->PKCMP &= ~(uint32_t)(BCCU_CH_PKCMP_ONCMP_Msk);
492 channel->PKCMP |= (level << BCCU_CH_PKCMP_ONCMP_Pos);
493 }
494
495 /*
496 * API to disable a packer.
497 */
498 void XMC_BCCU_CH_DisablePacker (XMC_BCCU_CH_t *const channel)
499 {
500 channel->CHCONFIG &= ~(uint32_t)(BCCU_CH_CHCONFIG_PEN_Msk);
501 }
502
503 /*
504 * API to set packer off-time counter value
505 */
506 void XMC_BCCU_CH_SetPackerOffCounter (XMC_BCCU_CH_t *const channel, uint32_t cnt_val)
507 {
508 channel->PKCNTR &= ~(uint32_t)(BCCU_CH_PKCNTR_OFFCNTVAL_Msk);
509 channel->PKCNTR |= cnt_val;
510 }
511
512 /*
513 * API to set packer on-time counter value
514 */
515 void XMC_BCCU_CH_SetPackerOnCounter (XMC_BCCU_CH_t *const channel, uint32_t cnt_val)
516 {
517 channel->PKCNTR &= ~(uint32_t)(BCCU_CH_PKCNTR_ONCNTVAL_Msk);
518 channel->PKCNTR |= (uint32_t)(cnt_val << BCCU_CH_PKCNTR_ONCNTVAL_Pos);
519 }
520
521 /*
522 * API to select the dimming engine of a channel
523 */
524 void XMC_BCCU_CH_SelectDimEngine (XMC_BCCU_CH_t *const channel,
XMC_BCCU_CH_DIMMING_SOURCE_t sel)
525 {
526 channel->CHCONFIG &= ~(uint32_t)(BCCU_CH_CHCONFIG_DSEL_Msk);
527 channel->CHCONFIG |= ((uint32_t)sel << BCCU_CH_CHCONFIG_DSEL_Pos);
528 }
529
530 /*
531 * API to bypass the dimming engine. And the brightness of channel is depending only
on
532 * intensity of the channel.
533 */
534 void XMC_BCCU_CH_EnableDimmingBypass (XMC_BCCU_CH_t *const channel)
535 {
536 channel->CHCONFIG |= (uint32_t)(BCCU_CH_CHCONFIG_DBP_Msk);
537 }
538
539 /*
540 * API to disable the bypass of dimming engine. And the brightness of channel is
depending
541 * on intensity of channel and dimming level of dimming engine.
542 */
543 void XMC_BCCU_CH_DisableDimmingBypass (XMC_BCCU_CH_t *const channel)
544 {
545 channel->CHCONFIG &= ~(uint32_t)(BCCU_CH_CHCONFIG_DBP_Msk);
546 }
547
548 /*
549 * API to initialise a specific dimming engine of a BCCU module
550 */
551 void XMC_BCCU_DIM_Init (XMC_BCCU_DIM_t *const dim_engine, const XMC_BCCU_DIM_CONFIG_t
*const config)
552 {
553 dim_engine->DTT = config->dtt;
554 }
555
556 /*
557 * API to set dimming engine target dim level
558 */
559 void XMC_BCCU_DIM_SetTargetDimmingLevel (XMC_BCCU_DIM_t *const dim_engine, uint32_t
level)
560 {
561 dim_engine->DLS = level;
562 }
563
564 /*
565 * API to configure the dimming clock prescaler factor of a dimming engine
566 */
567 void XMC_BCCU_DIM_SetDimDivider (XMC_BCCU_DIM_t *const dim_engine, uint32_t div)
568 {
569 dim_engine->DTT &= ~(uint32_t)(BCCU_DE_DTT_DIMDIV_Msk);
570 dim_engine->DTT |= div;
571 }
572
573 /*
574 * API to configure the dimming curve
575 */
576 void XMC_BCCU_DIM_ConfigDimCurve (XMC_BCCU_DIM_t *const dim_engine, uint32_t dither_en
, XMC_BCCU_DIM_CURVE_t sel)
577 {
578 uint32_t reg;
579 dim_engine->DTT &= ~(uint32_t)(BCCU_DE_DTT_DTEN_Msk | BCCU_DE_DTT_CSEL_Msk);
580 reg = (uint32_t)(dither_en << BCCU_DE_DTT_DTEN_Pos);
581 reg |= ((uint32_t)sel << BCCU_DE_DTT_CSEL_Pos);
582 dim_engine->DTT |= reg;
583 }
584
585 #endif /* BCCU0 */
586