FDM6296
FDM6296
January 2007
FDM6296
Single N-Channel Logic-Level PowerTrench® MOSFET
tm
30V,11.5A, 10.5mΩ
Features General Description
Max rDS(on) = 10.5mΩ at VGS = 10V, ID = 11.5A This single N-channel MOSFET in the thermally efficient
Max rDS(on) = 15mΩ at VGS = 4.5V, ID = 10A MicroFET package has been specifically designed to perform
well in Point of Load converters. Providing an optimized balance
Low Qg, Qgd and Rg for efficient switching performance between rDS(on) and gate charge this device can be effectively
RoHS Compliant used as a “high side” control switch or “low side” synchronous
rectifier.
Application
Point of Load Converter
Bottom Top
8 D
7 D D 5 4 G
6 D
5
D D 6 3 S
D 7 2 S
1 G
2
3 S D 8 1 S
4 S
S
Power 33
Thermal Characteristics
RθJC Thermal Resistance, Junction to Case (Note 1) 3.0
°C/W
RθJA Thermal Resistance, Junction to Ambient (Note 1a) 60
Off Characteristics
BVDSS Drain to Source Breakdown Voltage ID = 250μA, VGS = 0V 30 V
ΔBVDSS Breakdown Voltage Temperature
ID = 250μA, referenced to 25°C 29 mV/°C
ΔTJ Coefficient
IDSS Zero Gate Voltage Drain Current VDS = 24V, VGS = 0V 1 μA
IGSS Gate to Source Leakage Current VGS = ±20V, VDS = 0V ±100 nA
On Characteristics
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250μA 1 1.9 3 V
ΔVGS(th) Gate to Source Threshold Voltage
ID = 250μA, referenced to 25°C -5 mV/°C
ΔTJ Temperature Coefficient
VGS = 10V, ID = 11.5A 8.7 10.5
rDS(on) Static Drain to Source On Resistance VGS = 4.5V, ID = 10A 10.6 15 mΩ
VGS = 10V, ID = 11.5A , TJ = 125°C 13 17
gFS Forward Transconductance VDS = 5V, ID = 11.5A 47 S
Dynamic Characteristics
Ciss Input Capacitance 1507 2005 pF
VDS = 15V, VGS = 0V,
Coss Output Capacitance 415 555 pF
f = 1MHz
Crss Reverse Transfer Capacitance 128 170 pF
Rg Gate Resistance VDS = 15mV, f = 1MHz 1.1 Ω
Switching Characteristics
td(on) Turn-On Delay Time 10 20 ns
VDD = 15V, ID = 1.0A
tr Rise Time 5 10 ns
VGS = 10V, RGEN = 6Ω
td(off) Turn-Off Delay Time 27 44 ns
tf Fall Time 13 23 ns
Qg Total Gate Charge at 5V VGS = 5V 12 17 nC
Qgs Gate to Source Gate Charge VDD = 15V 4 nC
ID = 11.5A
Qgd Gate to Drain “Miller” Charge 3 nC
Notes:
1: RθJA is determined with the device mounted on a 1 in2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined by the
user's board design.
(a)RθJA = 60°C/W when mounted on a 1 in2 pad of 2 oz copper, 1.5’x1.5’x0.062’ thick PCB.
(b)RθJA = 135°C/W when mounted on a minimum pad of 2 oz copper.
2: Pulse Test: Pulse Width < 300μs, Duty cycle < 2.0%.
VGS = 3.0V
30 VGS = 3.5V
1.6 VGS = 3.5V
NORMALIZED
20 1.4 VGS = 4.0V
VGS = 3.0V
1.2
10 VGS = 10V
PULSE DURATION = 300μs 1.0
DUTY CYCLE = 2.0%MAX VGS =4.5V
0 0.8
0.0 0.2 0.4 0.6 0.8 1.0 0 10 20 30 40
VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT(A)
1.6 25
DRAIN TO SOURCE ON-RESISTANCE
1.2
15 TJ = 125oC
1.0
10
0.8
TJ = 25oC
0.6 5
-50 -25 0 25 50 75 100 125 150 2 4 6 8 10
TJ, JUNCTION TEMPERATURE (oC) VGS, GATE TO SOURCE VOLTAGE (V)
40 40
IS, REVERSE DRAIN CURRENT (A)
30 VDD = 5V
1 TJ = 125oC
0.01
TJ = 25oC TJ = -55oC
10
1E-3
TJ = -55oC
0 1E-4
0.5 1.0 1.5 2.0 2.5 3.0 3.5 0.0 0.3 0.6 0.9 1.2
VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)
ID = 11.5A
8 Ciss
1000
CAPACITANCE (pF)
VDD = 10V
6
VDD = 15V Coss
4
VDD = 20V
100
2 Crss
f = 1MHz
VGS = 0V
0 30
0 5 10 15 20 25 0.1 1 10
Qg, GATE CHARGE(nC) VDS, DRAIN TO SOURCE VOLTAGE (V)
100 500
2
1 DUTY CYCLE-DESCENDING ORDER
NORMALIZED THERMAL
D = 0.5
0.2
IMPEDANCE, ZθJA
0.1
0.1 0.05
0.02
PDM
0.01
t1
0.01 t2
NOTES:
SINGLE PULSE
DUTY FACTOR: D = t1/t2
o
RθJA = 135 C/W PEAK TJ = PDM x ZθJA x RθJA + TA
1E-3
-4 -3 -2 -1 0 1 2 3
10 10 10 10 10 10 10 10
t, RECTANGULAR PULSE DURATION (s)
www.fairchildsemi.com
5
FDM6296 Rev.E
FDM6296 Single N-Channel Logic-Level PowerTrench® MOSFET
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not
intended to be an exhaustive list of all such trademarks.
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO
IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE
OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE
RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS,
SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Rev. I22