Digital Logic Families

Dr. Jaydeb
d b Bhaumik
h ik
Associate Professor
Dept of ETCE
Dept.
Jadavpur University
 Integration Levels

Logic gates and memory devices are fabricated as integrated circuits (ICs) because
the components used such as resistors, diodes, bipolar junction transistors and
metal-oxide
metal oxide semiconductor field
field-effect
effect transistors are the integral parts of the chip.

The ICs result in an increase in reliability and a reduction in weight and size

™ Gate/transistor ratio is roughly 1/10

™ SS 12 gates/chip
SSI< / hi
™ MSI< 100 gates/chip
™ LSI…1K gates/chip
™ VLSI…10K gates/chip
™ ULSI…100K gates/chip
™ GSI 1Meg gates/chip
GSI…1Meg

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 Moore’s law

™ A prediction made by Moore (a co-founder of Intel) in 1965:

“… a number of transistors to double every 2 years.
years ”

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Logic Families

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 Characteristics of Digital ICs
™ There are various logic families and the selection of a family for a
particular application is based on its characteristics:
™ Following are the parameters used to compare the performance of digital
Ics:
™ Speed of operation
™ Power dissipation
p
™ Figure of merit
™ Fan-out
™ Fan-in
Fan in
™ Noise Immunity
™ Operating Temperature

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Propagation Delay

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 Fan-out
™ The fan-out of a gate specifies the number of standard loads that can be
connected to the output of the gate without degrading its normal operation. A
standard load is usually defined as the amount of current needed by an input of
another gate in the same logic family.
family

™ The output of a gate is usually connected to the inputs of other gates. Each
input consumes a certain amount of current from the gate output,
output so that each
additional connection adds to the load of the gate.

™ Exceeding the specified maximum load may cause a malfunction because the
circuit cannot supply the power demanded from it. The fan-out is the maximum
number of inputs that can be connected to the output of a gate, and is expressed
by a number.

™ The fan-out is calculated from the amount of current available in the output of
a gate and the amount of current needed in each input of a gate.

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 Cont.
Thee output
ou pu ofo thee gate
ga e iss in thee high
g voltage
vo age level
eve in figure
gu e (a) and
a d it provides
p ov des a
current source IOH to all the gate inputs connected to it. Each gate input requires
a current IIH for proper operation. Similarly, the output of the gate is in the low
voltage
oltage level
le el in figure
fig re (b).
(b) It provides
pro ides a current
c rrent sink IOL for all the gate inputs
inp ts
connected to it. Each gate input supplies a current IIL. The fan-out of the gate is
calculated from the ratio IOH/IIH or IOL/IIL

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 Fan-in

The number of inputs which a single gate may have is referred to as the fan-in of
the gate and is also specified by the manufacturer. For example, an eight-input
gate
t requires
i one unit it load
l d per input.
i t Its
It fan-in
f i is i 8.
8 This
Thi parameter
t determines
d t i
the functional capabilities of a logic circuit.

Operating Temperature: All IC gates are semiconductor devices that are

temperature – sensitive by nature. The operating temperature ranges for an IC
vary from 0oC to 70oC for consumer and industrial applications and from -55
55oC
To +125oC for military and space applications.

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 Power Dissipation
The power dissipation
Th di i ti is i a parameter
t expressedd in
i mW W or nWW and
d represents
t
the amount of power needed by the gate. The number that represents this
parameter does not include the power delivered from another gate; rather, it
represents the power delivered to the gate from the power supply. An IC with
four gates will require, from its power supply, four times the power
dissipated in each gate.

The amount of power that is dissipated in a gate is calculated from the supply
voltage
lt V and
Vcc d the
th currentt Icc
I that
th t is
i drawn
d by
b the
th circuit.
i it TheTh power is
i the
th
product Vcc x Icc. The current drain from the power supply depends on the
logic state of the gate. The current drawn from the power supply when the
output of the gate is in the high-voltage level is termed ICCH. When the output
is in the low-voltage level, the current is ICCL The average current is

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 Noise Margin
Spurious electrical signals can induce undesirable voltages on the connecting wires
between logic circuits. These unwanted signals are referred to as noise. There are
two types of noise to be considered
considered. DC noise is caused by a drift in the voltage
levels of a signal. AC noise is a random pulse that may be created by other
switching signals. Thus, noise is a term used to denote an undesirable signal that is
superimposed
i d upon the
h normall operating
i signal.
i l

Noise margin is the maximum noise voltage added to an input signal of a digital
circuit that does not cause an undesirable change in the circuit output. The ability
of circuits to operate reliably in a noise environment is important in many
applications. Noise margin is expressed in volts and represents the maximum noise
signal that can be tolerated by the gate.

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 Cont.

Figure (a) shows the range of output voltages that can occur in a typical gate.
gate Any
voltage in the gate output between VCC and VOH is considered as the high-level state
and any voltage between 0 and VOL in the gate output is considered as the low-level
state. Voltages
g between VOL and VOH are indeterminate and do not appearpp under
normal operating conditions except during transition between the two levels.
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 Cont.
The corresponding two voltage ranges that are recognized by the input of the gate
are indicated in figure (b). In order to compensate for any noise signal, the circuit
must be designed so that VIL is greater than VOL and VIH is less than VOH. The noise
margini is
i the
h difference
diff VOH - VIH or VlL - VOL, whichever
hi h is
i smaller.
ll

As illustrated in figure,
figure VOL is the maximum voltage that the output can be when in
the low-level state. The circuit can tolerate any noise signal that is less than the
noise margin (VIL - VOL) because the input will recognize the signal as being in the
low-level
low level state
state.

Anyy signal
g greater
g than VOL pplus the noise-margin
g figure
g will send the input
p
voltage into the indeterminate range, which may cause an error in the output of the
gate. In a similar fashion, a negative-voltage noise greater than VOH - VIH will send
the input voltage into the indeterminate range.

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 Figure of merit: PDP

™ The power dissipation of logic families should be minimum to reduce

power requirements. But it is important to note that in logic families, if the
power dissipation is reduced,
reduced the speed of operation gets reduced.
reduced Hence
the figure of merit is a parameter considered for comparison instead of
using the speed of operation and power dissipation. Figure of merit is a
product of power dissipation and propagation delay (PDP). It is measured
in terms of Pico-Joules (ns × mW = pJ).

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Nomenclature of Logic Families

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 Cont.

A dual in-line package- is an electronic component package with a rectangular

Housing and two parallel rows of electrical connecting pins

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 Resistor-Transistor Logic (RTL)

In RTL ( resistor transistor logic), all the logics are implemented using resistor
and transistor.

RTL draws a significant amount of current from the power supply.

RTL gates
t can nott switch
it h att the
th high
hi h speeds
d required
i d for
f today’s
t d ’ computers,
t although
lth h
they are still useful in slower applications.
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Complimentary Symmetry MOS (CMOS)

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CMOS Inverter

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Cont.

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Advantages of CMOS Technology

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