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ME8791 Mechatronics

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kokmokka
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© © All Rights Reserved
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0% found this document useful (0 votes)
22 views83 pages

ME8791 Mechatronics

Uploaded by

kokmokka
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Manufacturing Financial Management

technology control

Engineering
Mechanical
engineering

Control
Electronic Computing
engineering

Education Working practices


& & Marketing
training Industrial relations

Mechanism Electronics

Mechatronics
INPUT OUTPUT
MOTOR
(Electric power) (Rotation)

Measurement Plotter
Output signal Audio/visual Input Measurement Output
External and Communication
CPU conditioning Indication Outputs true value system measured value
environment actuation module
module
module Display
Actuators Signal conditioning Processor ADC/DAC
Sensors nterfacing Software Amplifier
Bus communication Control algorithm

Feedback
module
Feedback
signal

Gear Hair spring

Display
Input Outputs
Pointer quantity measured
Link being Signal
Sensor Record value
measured conditioner
of
Sector (True value) variable
and Transmit
Bourdon pinion
tube
Stationary
socket

Pressure
connection
Characteristics of measurement system

Static Dynamic
characteristics characteristics

Accuracy Speed of response


Resolution Fidelity
Precision Lag
Repeatability
Sensitivity
Linearity

Full scale reading 500


No. of divisions 100
1
  1 scale division
10
1 1
5 V Hysteresis
10 2 error
Percentage
output

0 nput ( range)

Y
100 Theoretical
specified
maximum

Maximum deviation
Output ( F.S.)
Maximum deviation of output from idealized straight line
50 Terminal based  100
straight line Actual reading

0 X
0 50 100
nput ( range)

Terminal linearity

Y
100
ndependent
Straight line
Deviation

Output ( F.S.) 50

0 X
0 50 100
nput ( range)

Independent linearity

Y
100

Best fit line

Output ( F.S.) 50

0 X
0 50 100
nput ( range)

Least square linearity

Output voltage
Input temperature

Output voltage

200

3.5

Input temperature
3.5

0.01
Output

100 %
Steady
state value
90 %

Response time

Settling time

0 Time

Rise time
(0 - 90 %)
Sensing element
Input Output
(Sensor)

Sensor
Transducer
o/p

Input Signal Output


physical Transducer signal
conditioner
Vi
– +

Slider motion
L

A B
Resistance Rotating shaft
wire controls position
x of wiper arm
a
– Vo
+ c b

OHMs Wiper
5 k

2.5 k  = (360º – ) 7.5 k

x Vo

L Vi 0 k  10 k
A B

Vs
C
Output
voltage
Vo

Rmin
Rmax Wiper position

 


 max

 
Vout V
 max

82
Vout  10
350
50 mm
Vout

A B

Slider position is at center

 tot
 tot
A R1 = 3850  R2 = 6150  B


Slider position Linearity   tot .  350º


01

100 100
C
 


Output Maximum  Min. value given



Input Full range

12  0
320
12
850

S1 S2

  

Vi

Hollow
former
Power P
Current I Primary
S1 S2
winding
P

V /R

Movable
 PR 50  10 3  8  10 3 plunger

xi 2 Motion

xT 5
Primary
S1 S2
winding
 Ferrite core

V1 V2

Output Max. – Min. value given


 100
Input Full range
S1 S2

10
750

Movable
core

S1
Vi
V1

Vin Vo Differential o/p Vo


0 Core at null

S2
Vo
V2
Core below null
0

Motion

Vo

Core above null


0

V1 S1
V2 S2
Vo V1  V2

V1 V2
S1 S2
|Vo|

Linear
range
x

Vi Vo Residual voltage

 –  = 180º  = 0º +

Core displacement
 


Vo
Core displacement from centre

Vo

x

Vo m x

 

Body
Body 

Bore  S P S
1 2

Core


S P S
1 2

(a)

A.C. Output 

Core position

Position of core
(b) Secondary voltage 
Range of core displacement
Excitation
x1
Vs 
P x
( 20)
S S 10
1 2 50

Output
(c)
Secondary voltage (V s )
Range of core displacement (x)

10
50


Linear range


 0.003
1.5



Vo

Vo
x Output current 3  10 3
5 Displacement 0.75
1

 
Vo 5 x  
2 x  2  1  10
100
1

Vo 10
1
 
0.8
Vo 5   0.75
Vo
Vo

5x
3
  0.6
5

 bt 3
12
0.025  ( 0.005) 3
2.6  10 –9 m 4
12

FL 3 30  ( 0.3) 3
 
3EI 3  200  10 9  2.6  10 –9

5.9  10 –4 m

x 5.19  10 –4 

F 30

0.0173  0.6 0.0104 V N
20 
100
2
 0.2
10
0.04
0.0104
20
0.0104

Sec-1 Primary Sec-2


r 0 A
d
Core
r

Input 0 8.854  10 12


shaft
m2

x x Angular motion
Max  cm 2

Capacitance
Non - linear r
('C')
d

Min Max
0 Distance ('d')

Plate moves
and changes 'd'

A
d Overlap area C
Linear

area
Plate moves
and changes 'A'
 



 
d

Dielectric
moves
d

A 10 3
d1
10 9
0
8.85  10 12  500  10 6 36 
0.4  10 3
r

10 9 ( 625  10  6 ) 6 . 25  10 13

36  (1  10 3 ) 113 . 09  10 3

10  12

Change in capacitance C (C 1  C)
Change in distance d ( d   d)
10  3
(C 1  C)
(d1) 5 . 52

1. 4
0.5  10 3 m
A

d

(8.85  10 12  500  10 6 )


(0.5  10 3 )

(11.0625  8.85) p F

0.1 mm
End loops

Grid
Active
25 mm  25 mm grid length
Alignment
marks

End loops
 0  r  A
d Backing and Solder tabs
encapsulation

10  6
Strain gauge

A
R1
R3
Mechanical Optical Electrical
+ strain gauge strain gauge gauges
D VG B

R2 Rx

C
Semiconductor
Wire gauges
gauges

Bonded Unbonded Foil


gauges gauges gauges

(

 D D

L L

 

L L

 
1  2  a
Resistance change due Resistance change due Resistance change due to change in
to change in length to change in area resistivity or piezoresistance effect

 
L

A 


R  L A
 
R  L A

A D
2 L
A D
R  L 2D
  
R  L D R/ R
L/ L

 R / 120
R R 0.005 / 0.25
L L
0.005
 L 4  120
R R R R 0.25

L L Axial strain
R 
L

L R1 R
D
 
D
  

 
  
 




 R 
 
 R  t
( s   g ) G   t




High-frequency magnetic field

T
a
Amplitude
r Output
L C detecting
g circuit
circuit
e
t 1 2 3

Oscillation circuit
VH

Magnet

Lines of
N
force

Directional
magnetic
field (H)

Constant + + + + + +
current flow
+
VH Hall
voltage

– – – – – –

P-type
semiconductor
hall element + – i

DC supply

  

Meter
or
Sensing recorder
junction

Reference
junction
Copper
Voltmeter
– +

(COLD) (HOT)
T1 Junction 1 Junction 2 T2

2700 

Constantan

80

70

an
nt
n
nta

ta
sta

ns
60
on

co
nc

el-
Iro

m
Thermal 50 tan
stan
ro
e.m.f. con
Ch per
(mV)
40 Cop

30 odium
m/Rh
latinu
um-P
Platin
20

10
R1 R2

0 Temp. ºF +
2 4 6 8 12 14 16 18 22 24 26 28

1000 2000 3000
RTD R3 V

 

R0 T0
T0


1 1 
RT R 0e   – 
 T T0 
Resistance

Resistance

TR
Temperature Temperature
Fixed end
Free end Low expansion
To coefficient
k1

k2 High expansion
k2 < k1 coefficient

T < To

Active side
Passive side
Strip
bends
when
temperature
changes (b) Curved bimetallic strip

(a) Flat bimetallic strip

Fixed end
t{3(1  m) 2  (1  mn)[m 2  1/ mn]} /6( h -  l)(T2 – T1 )(1+ m) 2
Fixed
end
Pointer

Free end
Free end

Scale
(d) Helical bimetallic strip
(c) Flat spiral bimetallic strip

 l
 h

v R R
Resistance

Resistance
Voltage

T T T
Temperature Temperature Temperature
 
Quantity
measured Transducer Signal Value
processor Recorder
or sensor

R R
L L

 r 0
 r 0

Active side
Passive side
Strip
bends
when
temperature
changes (b) Curved bimetallic strip

(a) Flat bimetallic strip

Fixed end

Fixed
end
Pointer

Free end
Free end

Scale
(d) Helical bimetallic strip
(c) Flat spiral bimetallic strip

 10 12
30 cm  20 cm 0.06 m 2

1.2  10 –3 m

0 8.854  10 12

r
 0 r A
d

8.854  10 12  1.006  0.06


1.2  10 –3

4.453  10 14

Change in capacitance
Change in distance

c 4.453  10 14
d 1.2  10 –3

3.7108 10 9
A15
Address bus
A0

Memory Input
8085 Output Real
world
MPU
D7
D0 Data bus

Control bus
INTA RST 6.5 TRAP
INTR RST 5.5 RST 7.5 SID SOD

Interrupt control Serial I/O


control

8-Bit internal data bus

(8) (8) (8) (8) (8) (8)


Accumulator Temp. reg. Flag flip-flops Instruction B reg. C reg.
register (8) (8)
D reg. E reg.
(8) (8)
Instruction Instruction H reg. L reg.
decoder decoder (16) Register
and and Stack pointer array
machine machine
(16)
cycle cycle
Program counter
encoding encoding
(16)
Incrementer/
Decrementer
address latch
Power +5V
supply GND
Timing and control
X1
X2 Clk
Gen Control Status DMA Reset (8) (8)
Address buffer Address buffer
Clk out RD WR ALE S0 S1 IO/M HLDA Reset out
Ready Hold Reset in
A15 - A8 AD7 - AD0
Address bus Address/Data bus

Accumulator A (8) Flag Register

B (8) C (8)

D (8) E (8)

H (8) L (8)

Stack pointer (SP) (16)

Program counter (PC) (16)


Data bus Address bus

16
8 Lines
Lines

Bidirectional Unidirectional

D7 D6 D5 D4 D3 D2 D1 D0
+5 V GND

1 40 20
2
Serial SID 5 X1 X2 Vcc Vss X1 1 40 VCC
I/O SOD 4
ports X2 2 39 HOLD
28
A15 RESET OUT 3 38 HLDA
High-order
A8 address bus SOD 4 37 CLK(OUT)
TRAP 6
21

Externally initiated signals


RST 7.5 7 SID 5 36 RESET IN
19
RST 6.5 8 6 35
AD0 TRAP READY
RST 5.5 9 Multiplexed
INTR 10 address / data RST 7.5 7 34 IO / M
AD7 bus
RST 6.5 8 33 S1
READY 35 12
RST 5.5 9 32 RD
HOLD 39
INTR 10 31 WR
RESET IN 36
8085A
8085A INTA 11 30 ALE

acknowledgment
External signal
INTA 11 AD0 12 29 S0

HLDA 36 30 AD1 13 28 A15


ALE
29 S0 AD2 14 27 A14
33 S1 Control AD3 15 26 A13
34 and
IO / M status AD4 16 25 A12
32
RD signals
31 AD5 17 24 A11
WR
AD6 18 23 A10
AD7 19 22 A9

3 37 Vss 20 21 A8

RESET OUT CLK OUT

(a) Functional pin diagram (b) Pin configuration

TRAP
RST 7.5
RST 6.5 (Inputs)
RST 5.5
INTR
INTA (Active low output)
Input A Q
Output

Enable E

A Q
Y
B
E
SIGNAL T1 T2 T3 T4

CLOCK

A15 - A8 Higher order memory address Unspecified

Lower-order
AD7 - AD0 Decode (D7 - D0)
memory addr.

ALE

IO/M,S1,S0 IO/M = 0, S1 = 1 S0 = 0

RD

Rising edge Falling edge or negative edge


or
positive edge

1T - state
SIGNAL T1 T2 T3

CLOCK

A15 - A8 Higher order memory address

SIGNAL T1 T2 T3
Lower-order
AD7 - AD0 Data (D7 - D0)
memory addr.
CLOCK

ALE
A15-A8 I/O Port address

IO/M,S1,S0 IO/M = 0, S1 = 1 S0 = 0 I/O Port


AD7-AD0 Data (D7 - D0)
address

RD
ALE

IO/M,S1,S0 IO/M = 1, S1 = 1 S0 = 0
SIGNAL T1 T2 T3

RD
CLOCK

A15 - A8 Higher order address

Lower-order (D7 - D0)


AD7 - AD0 address Data

ALE

IO/M,S1,S0 IO/M = 0, S1 = 0 S0 = 1

WR

Opcode fetch Memory read Memory read Memory write


Address Mnemonics Opcode
T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13
4105 INR M 34H
CLK

Opcode fetch Memory read Memory write

AD0 - AD7 FFH 32H 00H 6AH 01H 52H 6AH C7H T1 T2 T3 T4 T5 T6 T7 T8 T9 T10
CLK

A8 - A15 41H 42H 42H 52H

AD0 - AD7 05H 34H 50H 12H 50H 13H

ALE
A8 - A15 41H 42H 42H
RD

ALE
WR

RD

IO/M,S0,S1 0,1,1 0,0,1 0,0,1 0,1,0


WR

IO/M,S0,S1 0,1,1 0,0,1 0,1,0


M1 (Opcode fetch) M2 (Memory Read)
T1 T2 T3 T4 T1 T2 T3
Signal T1 T2 T3 T4

CLK
Clock

A15 - A8 Higher order memory address Unspecified


High-order High-order
A15 - A8 20H Unspecified 20H
memory address memory address

Low-order Low-order AD7 - AD0 Lower order


Opcode for MOV A,B 
memory addr
AD7 - AD0 00H 06H Opcode 01H 43H Data

Memory address Memory address


ALE

ALE
IO/M, S1, S0 IO/M = 0, S1 = 1, S0 = 1

Opcode
IO/M,S1,S0 Status IO/M = 0,S1 = 1, S0=1
fetch IO/M = 0,S1= 1. S0 = 0 Status
RD

RD

Address Mnemonics Opcode

2000 MV IB, 43H 06H

2001 43H

T1 T2 T3 T4

IO / M
IO / M = 0, S1= 1 = S0
S1, S0

A15
PCH = 10H Unspecified
A18

AD7
PCL = 00H 41 H
AD0

ALE
RD

Arithmetic and logic unit


(ALU)

  Accumulator
Working registers

Program counter Stack pointer (SP)


(PC)

Interrupt
Clock circuit
circuits
Timer/counter Stack pointer (SP)
ALU

Accumulator(A)

Interrupt Registers
circuits

Internal
ROM Internal
RAM

Clock circuit
I/O ports

Program counter

External Counter
interrupt input

Interrupts 4K 128 Timer 1


control Flash RAM Timer 0

CPU

Bus 4 I/O port Bus


Osc.
control control

P0 P2 P1 P3
Address/data
C2
XTAL2
30 pF
Crystal
C1
XTAL1
30 pF

GND

P1.0 1 40 Vcc
P1.1 2 39 P0.0 (AD0)

P1.2 3 38 P0.1 (AD1)

P1.3 4 37 P0.2 (AD2)

P1.4 5 36 P0.3 (AD3)

P1.5 6 35 P0.4 (AD4)

P1.6 7 34 P0.5 (AD5)

P1.7 8 33 P0.6 (AD6)

RST 9 32 P0.7 (AD7)


(RXD) P3.0 10 31 EA/VPP
8051
(TXD) P3.1 11 30 ALE/PROG
(INT0) P3.2 12 29 PSEN
(INT1) P3.3 13 28 P2.7 (A15)
(T0) P3.4 14 27 P2.6 (A14)
(T1) P3.5 15 26 P2.5 (A13)

(WR) P3.6 16 25 P2.4 (A12)


(RD) P3.7 17 24 P2.3 (A11)

XTAL2 18 23 P2.2 (A10)

XTAL1 19 22 P2.1 (A9)

GND 20 21 P2.0 (A8)

EA

PSEN
p
GROUP GROUP A I/O
A PORT A PA7-PA0
POWER +5 V CONTROL (8)
SUPPLIES GND

GROUP A I/O
PORT C PC7-PC4
Upper
BI-DIRECTIONAL (4)
DATA BUS
D7-D0
DATA
BUS
BUFFER 8-BIT
INTERNAL GROUP B
DATA BUS I/O
PORT C PC3-PC0
Lower
(4)

RD
WR READ/ GROUP B I/O
GROUP
A1 WRITE PORT B PB7-PB0
B
CONTROL (8)
A0 CONTROL
LOGIC
RESET

CS
PA3 1 40 PA4
PA2 2 39 PA5
PA1 3 38 PA6
PA0 4 37 PA7
RD 5 36 WR
CS 6 35 RESET
GND 7 34 D0
A1 8 33 D1
A0 9 32 D2
PC7 10 31 D3
8255A
PC6 11 30 D4
PC5 12 29 D5
PC4 13 28 D6
PC0 14 27 D7
PC1 15 26 VCC(+5 V)
PC2 16 25 PB7
PC3 17 24 PB6
PB0 18 23 PB5
PB1 19 22 PB4
PB2 20 21 PB3

RD WR CS A1 A0

PA PA6 - PA7 PA PA
8 8
2 PCU PC4 - PC7 2 PCU PC
5 PCL PC0 - PC3 5 PCL
5 5
PB PB0 - PB7 PB PB0 - PB7

RD WR CS A1 A0 All output Port A and port C acting as


O/P. Port B acting as I/P

D3 D2 D1

D0

D1
RD WR CS A1 A0 D2

D3

D4

D5

D6

D7
+5V +5V
Logic 1

Vo
Logic 0 Logic 0

Key released Key pressed Key released

+5V 0,1 Start


1,0

Initialise 8255 row, column


counter & key code reg

To I/P circuit
1,0 0,1

No Key
closed ?

Yes

Wait for Debounce

Set row counter

Is row
Ground one row counter = 0 ?
+5V

Read column counter


10 K 10 K 10 K 10 K
Decrement row counter

10 K Set column counter Yes


RESET PA3

10 K
IOWR PA2 No Is column
Check for key pressed counter = 0 ?
10 K
IORD PA1

10 K
PA0
D7 - D 0 8255 Is the No Increment code register
key
Decrement column counter
found ?
A2 A1 PB3

A1 A0 PB2 Yes

Transfer code to
PB1
A15 accumulator
A12
A13 CS PB0
A14
A0 Stop
a b c d e f g dp a b c d e f g dp

Common cathode Common anode

(b) Common cathode type seven-segment LED (c) Common anode type seven-segment LED

a a a
f b b b b
c g g
e c e c
d d d
a a a
f b f f b
g g g c
c c e c
d d
a a a
f b f b f b f
g g g g
e c c e c e c
d d d
f b a a a
a
c f b f f
e g
e g g g
dp e c e e
d d d d

(a) Seven-segment LED display module


+5V
D7
D6
D5
D4
D3

Fig. 3.6.3 Interface of 7 segment display through 8255 A


D2
D1
D0

2N2907
37 

2N22222
2.2 K

PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7

8255A
VCC

A1 A0 PA7
A15 A2 A1

A8

A0 CS
PA0

PB7 MSB
A7 b4
b3
Analog i/p Digital
signal ADC o/p
b2
A3
b1
D7 - D 0 PB0 LSB

IORD RD

IOWR WR
PC3 10 K
Reset Reset
PC2
PC1 +5 V
PC0

GND

SOC CLOCK

I/P0 EOC

I/P1 Control and


timing unit and
I/P2 S.A.R.
I/P3 8 Channel
analog
I/P4 multiplexer
I/P5
I/P6 O/P 8-bit
Latch O/P
I/P7 256 R
Register
ladder and
switch tree

C B A
Address lines O/P
Vref + Vref – Enable

3 1 28 2
Analog
4 2 27 1 inputs
Analog
5 3 26 0 
inputs
6 4 25 A
7 5 24 B Address
SOC 6 23 C
EOC 7 ADC 22 ALE
0808/
DB3 8 0809 21 DB7

9 20 DB6
OUTPUT CONTROL
10 19 DB5
CLK
11 18 DB4
VCC
REF + 12 17 DB0

GND 13 16 REF
DB1 14 15 DB2
Vref+
Vref+

CS +5 V
+5 V VCC Clock up

D0 - D 7 PA7 - PA0 O7 - O0
Analog
EOC I/P2
PC7 ADC i/p voltage
A2 0808
PC0
A1 SOC
OE GND
8255
Reset ALE
+5 V A B C

PB0
IORD
PB1
PB2
IOWR
CLOCK

START

ALE

EOC

OE

O/P

D7 D6 D5 D4 D3 D2 D1 D0

Vref–
Vref+

CS +5 V
+5 V VCC Clock up

D0 - D 7 PA7 - PA0 O7 - O0
Analog
EOC I/P2
PC7 ADC i/p voltage
A2 0808
PC0
A1 SOC
OE GND
8255
Reset ALE Vi
+5 V A B C

PB0
2n 24
IORD
PB1
PB2
IOWR Input
Resolution in V LSB

Vi 7. 5
2n 1 16  1
4 . 25
 
0 .5

1 1

f 1  10 6

 Tc T(n  1) 

VT
Vin
Vin

V in
Resolution b 1 , b 2 , b 3 .... b n  .
V in
6 . 000

40  10 3
V in Vo K V V ref b 1 2  1  b 2 2  2  ........  b n 2  n 
6.035
  V ref
40  10 3
KV
(TC) max 
bn
Vo
(10111011) 2 V FS
MSB
V FS K V V ref b1
b2
(1  128)  ( 0  64)  (1  32)  (1  16)  (1  8)  ( 0  4)  (1  2)  (1  1) V Digital
V o  fs input DAC Analog output
2
bn
V fs
  Vo  LSB
2n
 7. 28
Reference
voltage

 7. 28

Vref

R 2R 4R 8R

b0 b1 b2 b3
1 0 1 0 1 0 1 0

I0 I1 I2 I3
– R R R 2R
Vs
Iin
Vo
+
2R 2R 2R 2R

Bit 3 Bit 2 Bit 1 Bit 0 R


Vout

V ref
V
2n – 1
+
VR –

LSB MSB
Sw0 Sw1 Sw2

2R 2R 2R R


2R VC R VB R VA
+ +
Vo

b0 = 1 b1 = 0 b2 = 0
2.5 K
CS 14 5V
D0 - D 7 PA7 - PA0 B1 - B8
5K
4

IOR 15
8255 2.5 K 2
DAC0808
741
0.01 F + Vo
IOWR 2 3
16
–12 V 3 13 +5 V or
0.1 F VCC
1 +12 V

AD0
D0
AD7 Vref
D7 8
D0 Rf
PA
D7
IOR RD D8
PCL
8255 D11 DAC
IOW WR
4 Iout –
Reset Reset
A0 A0 +
+ Vout
A1 A1

From CS
address
decoder
VLC 1 16 Compensation
Iout 2 15 Vref (–)

V– 3 14 Vref (+)
Iout 4 13 V+
B1 5
0800
12 B8 LSB 
B2 B7 5 ms
6 11
8 s
B3 7 10 B6
B4 8 9 B5
5 ms

585

1
 
5 MHz

8 . 547 s
0.2 s
+5 V
Clock
Input VREF(+) VCC OE ALE PA3 1 40 PA4
12 11 9 22 PA2 2 39 PA5
CLK D0 LED1
10 21
EOC PA1 3 38 PA6
7 D1 LED2
20 IN3 1 28 IN2 PA0 4 37 PA7
SC
6 IN4 2 27 IN1 5 36 WR
Analog D2 LED3 RD
IN0 19
Input 25 IN5 3 26 IN0 CS 6 35 RESET
IN1 D3 LED4 Programming logic :
27 18 IN6 4 25 ADD A gnd 7 34 D0
IN2 Configure 8255 I/O ports
28 D4 LED5 IN7 5 24 ADD B A1 8 33 D1
ADC 8 8085 sends SOC command to ADC
IN3 0808 START 6 23 ADD C A0 9 32 D2
1 8085 waits for EOC signal from ADC
D5 LED6
IN4 15 EOC 7 ADC 22 ALE PC7 10 8255 31 D3
2 8085 reads 8-bit temperature value from port A (MSB)
–5
8 0808 21 –1
PC6 11 PPI 30 D4
IN5 D6 LED7 8085 compares the value with set point value 2 2
3 14
–2
IN6 8085 generates the control signal to control load OUTPUT ENABLE 9 20 2 PC5 12 29 D5
4 D7 LED8 –3
17 CLOCK 10 19 2 PC4 13 28 D6
IN7
5 VCC –4
Vref(–) 11 18 2 PC0 14 27 D7
16 –8 (LSB)
VREF(+) 12 17 2 PC1 15 26 VCC
25 24 23 13
GND 13 16 VREF(–) PC2 16 25 PB7
A B C GND
–7 –6
2 14 15 2 PC3 17 24 PB6
PB0 18 23 PB5

PB1 19 22 PB4

PB2 20 21 PB3

+12 V

38.6 K
33 K
+12 V 10 K +12 V

ADC 8085
10 K
converter Microprocessor
IC 0808 unit
Water –12 V
38.6 K
10 K 10 K
Heater

Differential amplifier
using (op-amp)
Sensor (AD590)
+5V +5V

VCC VCC
ALE

Enable
address A1
A8-A15
+ VCC latch A0
IC 74373

Bi- +12 V
directional Stepper motor
Reset IN D0-D7
buffer
SW C IC 74245
A
GND
+ VCC

E1 E2 A1 B
8085 O0 8255
C1 RD C A1 Current
O1 driver
X1 WR B
A1 circuit C
IO/M A O2
A1
3:8 O3
X2 Decoder
D
C2 IC 74138 O4
IOR
O5 RD
IOW
O6 WR
O7

Reset out Reset

A5 A6 A7

E1 E2 O0 CS
A14
GND A15 A4 C GND
O1
A3 B
A2 A O2
3:8 Fig.O43
Decoder
IC 74138 O4
O5

O6

O7

To 8085
Microprocessor 220 
PB2 PB3 PB4 PB5 PB6 PB7 D0 - D 7 D0 - D 1 PA7
.
PC1PC2PC3 . +5 V
PA,PA,PC,
PA0
G Y R
G Y R N

W E 220 
A0 A0 PB7
.
S 8255 . +5 V
PA2 PA1 PA0
PA5 PA4 PA3
A1 A1 PB0
R Y G
R Y G

PC6 PC5 PC4


PB5 PB6 PC7 220 
IOW WR PC7
.
. +5 V
PC0
CS CS
Inverted LED
buffer
+12 V

Free
wheeling
diode 230 V AC
50 Hz
5.1 K
AD0 PA0 BC547
D0
AD7 D7 PA1
PA2
PA3
A0 A0
PA4
N A1 A1 PA5
8255 PB0 +12 V
IOR RD
R 1 PB1
Free
Y 1 IOW WR PB2 wheeling
G 1 PB3 diode
RESET OUT RESET PB4
W E OF 8085 5.1 K
PB5 BC547
CS
R Y G R Y G
3 3 3 4 4 4
R 2 A2 A
Y 2 A3 B
G 2 A4 C
S 74LS138 Y0
A5 G1
A6 G2
A7 G

PA 0 R1 PB0 R3

PA1 Y1 PB1 Y3

PA 2 G1 PB2 G3

PA 3 R2 PB3 R4

PA 4 Y2 PB4 Y4

PA 5 G2 PB5 G4

C2 U1
39
P0.0/AD0
19 38
22 pF XTAL1 P0.1/AD1 5V
37
P0.2/AD2
X1 36
P0.3/AD3
35
C1 P0.4/AD4
18 34
P0.5/AD5
XTAL2 33
Crystal P0.6/AD6
22 pF 9 32
11.0592 MHz RST P0.7AD7
21
P2.0/A8
C3 22
P2.1/A9
P2.2/A10 23
29 PSEN 24 + 88.8
P2.3/A11
10 F 30 ALE 25
P2.4/A12 Servo motor
5V 31 26
R1 EA P2.5/A13
10 K 27
P2.6/A14
28
P2.7/A15
1 10
P1.0 P3.0/RXD
2 11
P1.1 P3.1/TXD
3
P1.2 12
4 P3.2/INT0
P1.3 13
5 P3.3/INT1
P1.4 14
6 P3.4/T0
P1.5 15
7 P1.6 P3.5/T1
8 P3.6/WR 16
P1.7
17
P3.7/RD

AT89S52

PIN 40-Vcc, PIN 2-GND


20 ms 0°

1 ms 90°
V CC

1.5 ms 180°

2 ms Angular rotation


PA3 1 40 PA4
PA2 2 39 PA5
PA1 3 38 PA6
PA0 4 37 PA7
RD 5 36 WR
CS 6 35 RESET
GND 7 34 D0
A1 8 33 D1
A0 9 32 D2
PC7 10 31 D3
8255A
PC6 11 30 D4
PC5 12 29 D5
PC4 13 28 D6
PC0 14 27 D7
PC1 15 26 VCC(+5 V)
PC2 16 25 PB7
PC3 17 24 PB6
PB0 18 23 PB5
PB1 19 22 PB4
PB2 20 21 PB3
D7 D6 D5 D4 D3 D2 D1 D0

0 X X X S/R

Don't care bits, Bit select 1 = Set


normally put to 0
CS A1 A0 0 = Reset

D3 D2 D1 Particular bit of
port C selected
0 0 0 Bit 0
0 0 1 Bit 1
0 1 0 Bit 2
0 1 1 Bit 3
1 0 0 Bit 4
1 0 1 Bit 5
CS 1 1 0 Bit 6
1 1 1 Bit 7

CS A7 A6 A2

D7 D6 D5 D4 D3 D2 D1 D0

1 1 X X X 1/0 1/0 1/0

PC2-PC0
1 = Input
0 = Output

Port B
1 = Input
0 = Output
D7 D6 D5 D4 D3 D2 D1 D0
Group B mode
1 0 0 1 1 0 0 0 = 98H
0 = Mode 0
1 = Mode 1
I/O Mode 0 Port A Port CU Port B Port CL
mode for port A input input not used output

D7 D6 D5 D4 D3 D2 D1 D0

1 0 0 1 1 0 1 0 = 82H

I/O Mode 0 Port A Port CU Mode 0 Port B Port CL


mode for port A output output for port B input output
PC3 INTRA

PA7-PA0

PC7 OBFA

INTE
PC6 ACKA
1

INTE PC4 STBA


2
PC5 IBFA
WR

RD PC2-PC0 I/O

D7 D6 D5 D4 D3 D2 D1 D0

OBFA INTE1 IBFA INTE2 INTRA X X X

Group A Group B


Programming
devices

CH1 CH4

CPU
nputs CH2 CH5 Outputs
Memory

CH3 CH6

/P O/P
Module Module
Power
supply

Address bus

Program
Control bus
panel

User Input/
Battery System Data
program CPU Clock output
ROM RAM
RAM unit

Data bus

I/O system bus

Buffer Latch

Opto- Driver
coupler interface

Input Drivers Ex:Relays


channels

Output
channels
1

Operating
4 2
cycle


PLC

Protection Optocoupler
nput diode
from
sensor To CPU

Voltage
divider
circuit

24 V, 100 mA

110 V, 1 Amp
From output Output Switching
module channel outputs
240 V, 1 Amp

240 V, 2 Amp

+ +

nput Output
module module
nput
device
– –
Output
load

5V

24 V
nputs nput To input module
channel (digital output)
110 V

240 V +

Load –
Optocoupler
+ +
nput Output
device load
nput Output
module module

Load +
Current
flow

Optocoupler –

PLC Rung - 1

Rung - 2

Rung - 3
Power
lines

END End rung

Normally open Normally closed


limit switch limit switch

Pressure
limit switches

NO NC

Temperature
limit switch

NO NC
PBI PB
(Normally open) (Normally closed) Level
limit switches

NO NC

Lever pushed
down by contact

Normally open (NO) Normally closed (NC)


input contact input contact

Button to operate
switch
Relay coil CR

Contactor
(solenoid)

Two position valve

Motor M

Light

A B Lamp
A Input A Input B Output
AND Y = AB
B

Output = Lamp
Symbol AND circuit PLC AND logic

AND system

X400 X401 Y430

Output
nput

A Lamp Input A Output


A
OR
B
B

Input B Output = Lamp


Symbol OR circuit PLC OR logic
OR system

X400 Y430

Y401

Input 1 Output
NOT A Lamp
A AB AB
AND
B
B

A AB
NAND Input 2
B
Output = Lamp
Symbol NAND circuit PLC NAND logic

AB NAND system

X400 Y430

X401
Bubble indicates
inversion
Switch
NOT A Lamp Input A Output
A A

Output = Lamp
Symbol NOT circuit PLC NOT logic

A B Lamp
NOT
A A+B A+B
OR
B NOR circuit
XOR System
Input A Input B Output A B

A A+B X400 X401 Y430


NOR
B
Output = Lamp
Symbol PLC logic
X400 X401

A+ B NOR system

X400 X401 Y430

AND
A
A AB nput A Output B Output
NOT Input A Input B Output
B
B
B Output
AB
OR
A

NOT A Input A Input B


AB Output = Lamp
PLC XOR Logic
B
AND Simplified
A AB
XOR
B
X 400 X 401 Y 430
Motor output

Y 430

Y 430 Y 431
Lamp for power TON
not applied Timer ON Delay (EN)

Y 430 Y 431 Time T4:1 (DN)


Lamp for power
Time Base 1.0
applied
Preset 100
Accum 0

I:010 TON
Timer ON Delay (EN)
When the input condition is true, the Time T4:0 (DN)
processor increments the accumulated value Time Base 1.0
of T4:0 in 1 second increments.
Preset 10
Accum 0

T4:0 0:020
Sets the output when the timer is timing
( )
DN

T4:0 0:030
Sets the output when the timer is done timing
( )
DN

On TOFF
Input condition A Off
Timer Off Delay (EN)
On
Time T4:2 (DN)
Timer-enable bit Off
Time Base 1.0
On
Preset 150
Timer-timing bit Off 4s 10 s Accum 0
On
Timer-done bit Off

Timer accumulated 0
value

I:012 TOFF
Timer Off Delay (EN)
When the input goes false, the Time T4:0 (DN)
CR017 processor starts incrementing the accumulated
IN001 Time Base 1.0
value in T4:0 in 1 second increments until the input
CM On Preset 100
goes true.
CR017 Accum 0
Off
8
CR018 Sec T4:0 0:015
CR017 Sets the output when the timer is timing
On ( )
GM CR018 TT
TON Off
CR017 8 Sec.
IN001 IN001 T4:0 0:030
On Off Resets the output when the timer is done timing
( )
DN
I:012 RTO
Retentive Timer ON (EN)
When the input is true, the processor starts Timer T4:10 (DN)
incrementing the accumulated value of in T4:10 in Time base 1.0
1 second increments. The timer values remain
when the input goes false. Preset 9
Start Stop Main motor Accum 0
M1
( ) Rung 1
O:0/0
I:0/0 I:0/1
I:017 T4:10
Resets the timer
(RES)
O:0/0
EN
TOFF ( ) Rung 2
T4:1 True
O:0/0 Timer input
Preset 15 ( ) DN False

Lub. motor Timer T4:10 On


enable bit Enable bit is reset
M2
( ) Rung 3 Off when input I:012
Accum = Preset is opened
T4:0/DN O:0/1 9
8
7
Accumulated value retained when 6
rung condition goes false 5
4
3
2
1
0
Accumulated value
On
T4:10 Done bit
Off
Output device On
(Controlled by
done bit) Off

Reset input On
I:0017 Off
0 1 2 3 4 5 6 7 8 9 10 11 12 13
Time in seconds

Inputs Ladder logic program Outputs


L1 L2
I:1/0 CTU
Rung 1 Count-up counter CU
PB1 (Count) Counter C5:1 Red PL
Preset DN
PB1 (Count) 7
Accumulated O:2/0 R
0
I:1/0
C5:1/DN O:2/0
O:2/1 G
Rung 2
Green PL
PB2 (Reset) Counter done bit Red PL

I:1/1 C5:1/DN O:2/1


Rung 3
Counter done bit Green PL

I:1/1
C5:1
Rung 4 RES
IN_sensor_object
PB2 (Reset)
CU
CTU
IN_switch_reset OUT_counts_reach ed

R Q ( )

25 PV CV 0 parts_counted


IN_sensor_object
CU
CTD
OUT_counts_reach ed

Down counters LD Q ( )

25 PV CV 0 parts_counted

IN_sensor_A IN_sensor_B
CU
CTUD
IN_sensor_B IN_sensor_A OUT_counts_reached

CD QU ( )
Ladder logic progam
IN_switch_reset
Inputs Enter Output
switch R QD
CTU
Enter Count-up counter CU Lot full
switch light
Counter C5:1
Preset 150 DN
LD
Accumulated 0
Exit
switch
CTU parts_counted
25 PV CV 0
Exit Count-down counter CD
switch
Counter C5:1
Preset 150 DN
Accumulated 0
Lot full
C5:1/DN light

Reset

Reset
C5:1
RES

Inputs Ladder logic program Output


L1 L2

PB1 Count
up

PB1 UDC Light Light


PB2 Count
down PR: 003

PB2 AC: 000


PB3
Reset

PB3

IR coil

Internal
relay Energizing the
coil activates
Contacts the contact
X400

Input 1 Stop MOV S D


IR1 Start IR
D1 D2

Input 2 IR

Source Destination
Input 3 Input 4 IR2 IR Output 1 address address

IR1 Output IR Input Output 2

IR2 IR Input Output 3

END
END

(a) An output controlled by (b) Starting of multiple outputs


two input

Compare
instruction
Value 1
True 1 X400
Compare > S D
Value 2 False 0

Source Destination
data data
address address

K = 90 IR Alarm K = 90 Y430
Source Source
> S D > S D S Y430
BIN S D BCD S D
Y430
Destination Destination

IR
 S D  S D R Y430
K = 75 K = 75

Coil number

MR0111
0004 Number of
IN0073 lines to be
Enable skipped
Line no. IN0201 CR0031

IN0202 CR0032

MCR0132
IN0203 0003
3

IN0204 CR0033
4

IN0205 CR0034

5 Three lines irrevocably


turned off when
MCR0132 is off
IN0206 CR0035

6 Main program
Program
CR0036 scan
IN0207
7
JMP JUMP

IN0208 CR0037
8

This portion
of program
is skipped,
not scanned

LBL JUMP DESTINATION


Program
scan

16

03
JMP
17 121 ON
121 OFF
18

19

20

Main program
Subroutine
21
LBL
127 011
03
22 LBL
04
08
23
JUMP
(JSR)

(RET)

Return to next line following JSR


Line
21

121 02
JSR
22
107 121 ON
03
121 OFF
23

Subroutine
area
04
02
107
LBL

108

109 RET

24

25

Stir (Motor operated) Start


Vin Stop
CR1 01 02
Rung 1
16
CR1
16
LH (Level limit)
CR1 Vout
LH 16 03 11
Temperature switch (Ts) Vin Rung 2
08
Vout
Vin Vo 08 11
LL S Rung 3 09

Vin ON
08 ON
H TR1 Rung 4
32
30 min. 1800
CR1 Vin
TR1 Ts 16 08 32 04
H Rung 5 10

Vin 32 05 08
TR1 LL
Vo Rung 6 11
SW2
Motor

P CR1

SW3

Q CR2
Gripper
SW1

R CR3

CR11 CR21

MOTOR
M CR12 CR31 X
SW 1-1 (Relay
coil)
M-2 SW 3-1
CR22 CR32
Direction
D
SW 1-2 (Relay
coil)
D-1 SW 2-1
Gripper

(Solenoid)
D-2 CW
Motor
D-3
(DPDT)
M-1
CCW

Furnace element 1

Element 2

Power Neutral
Start
line Stop line
Heater Indication panel
Rung 1
RUN STOP
CR1
TR1 Proximity
switch
120
Overheating
sensor Box
CR1 Element 1
Rung 2

Element 2
Rung 3 Conveyor
Motor
Local control panel
Closed after
120 sec.

Rung 4 (END) START Emergency


STOP
Start Emergency
PB1 stop
PB2
CR1

LS1

CR1-1
STOP
Input module Ladder logic program Output module
R
wiring connections PB1 PB2 LS1 wiring connection
L1 Internal L2
I:3 I:3 I:3 relay
CR1-2
RUN
0 1 2
G PB1 OL
O:4/1 M
CR1-3 I:3/0 Internal
relay
PB2 PL1 PL1
M
I:3/1 O:4 O:4/2 R
CR1-4 OL Internal 2
LS1
I:3/2 relay PL2
PL2 O:4/3 G
O:4

Internal 3 Legend:
Legend: relay
M M: Motor
PB1 : Start
O:4 OL: Overload relay
PB2 : Stop
R: Stop indication
LS1 : Proximity Internal 1
switch G: Run indication
relay

Feeder

I:1/0 I:1/1 O:2/0


000
Start Stop Master coil
Motor 3
O:2/0

Master coil
Lo
ad
ce O:2/0 O:2/1
ll 1
001
Master coil Motor 3
Motor 1
O:2/0 I:1/2 O:2/2
002
Load cell 2 Motor 2
Master coil Load cell 1 Motor 1

O:2/0 O:2/2 O:2/3


003
Master coil Motor 1 Motor 2
I:1/3

Load cell 2

004 END
24V

0V
soI1

soI2

COM
E2
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7

[END]
OUT0

OUT1
( )

( )
Timer ON -Delay (TON) (ON)

1s (ON)
T4:L8

0
5
Timer basa
TON

PB1 CR1 CR2 SOL


Accum
Preset
Timer

Hardwired relay
E1.IN0 E1.IN2

control circuit
LS1
E1.IN4

ON
L1

IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
COM

(PB1) (CR1) (CR2) SOL


E1

Equivalent ladder
diagram program
A B D Y
start

C
prox 1

prox 2

0V

(LS1)
24V
prox 2

soI2
prox 1

soI1

1.0

PB1 PB2 S1 S2

I1 I2 I3 I4

1.1
2 O1 O2
4

Y1 Y2 Y1 Y2
5 3
1

(a) Pneumatic diagram (b) PLC wiring diagram

Memory M1

I1 Set-reset
Memory signal from I1 sets and
1 Set O/P memory signal from I2 resets.

Reset

M1 I3 O1 M1 = 1, I3 = 1, Output O1 = 1, Y1 is ON
2

I4 O2 I4 = 1, Output O2 = 1, Y2 is ON

(c) Ladder diagram


 

10 s

Input

ON
OFF
Output
On-delay timer

Input 1 IR Output
( )

Output

Input 2 IR
( )
IN 1 IN 1 IN 2
Y Y
IN 2
NOR gate Ladder logic for NOR gate

Personal computer User interface

Sensors Controller Actuators

Process

IN1 IN2
M
Variable reluctance
stepper motor

Stator
1

3 2

Rotor

2 3
Windings
1

Metal teeth
Winding 1 energized Winding 2 energized Winding 3 energized Winding 1 energized

N N
1 1 1 1

2 3 S2 3 2 3N 2 3

3 2 3 2N 3 2 3 2
S
1 1 1 1
S S

Hybrid
stepper motor

Stator
1

N
S S
2 2
N N
S
Windings
Rotor
Permanent magnet 1
stepper motor

Stator
1 Permanent
magnet poles and
metal teeth
N
S S
2 2
N N
S

Windings
Rotor
1

Permanent
magnet poles

Torque

Pull-out torque

Slew range
Pull-in torque

Pull-in Pull-out Maximum Speed


speed speed pull-out
speed
Maximum
pull-in
speed
Servomotor

A.C. servomotor D.C. servomotor Special servometer

Armature controlled Field controlled

Error
amplifier
Comparator Variable Motor Load
Pulse width to output
voltage converter

Control signal Position sensor Gear box

A.C.
supply

90º Reference winding


Control Rotor
voltage
form
servoamplifier

Control
winding
Fixed phase AC supply Load

Stator

Amplifier Rotor Servo


Position controller Servo
PLC
controller (amplifier) motor
Control
phase Position
Gears
command
Syn
generator Feedback
Stator encoder
Rotor

Control
transformer AC supply

Input
End
Rigid
effector
body 2

Rigid body 1

Moving
base
Signal Voltage Transient
regulator projection +12 V
conditioning

Engine speed
sensor
Ignition coil
Engine To ignition
drivers
temperature coil
sensor
Throttle
position
Fuel injector To fuel
Mass flow drivers injector
air sensor

Oxygen
sensor Microcontroller for
engine management
system Solenoid Idle speed
Knock drivers
sensor actuator

Oil pressure
sensor

Fuel pressure Solenoid


Engine gas
sensor drivers
regulation valve

Analog inputs ADC


SPI Data bus
SCI Data bus
Analog outputs DAC drivers

Fuel pump Pressure


Fuel tank
regulator
Fuel filter
Ignition coil

Distributor

Oxygen
sensor
Air
flow

Mass air Pivot Barrier


Temp flow sensor
sensor Idle
Throttle speed
position actuator
Sensor sensor Connecting rod
Limit switch for barrier down
wheel
Electronic Cylinder
control
Speed unit Solenoid B
sensor

Piston
Solenoid A
X100 M100 Y201 Y200
Coin operated input
X100 is required to lift the entrance barrier
Y200 energies solenoid A
X200

X103 T450
When the barrier is in upward position input
PLC X101 starts timer
X101 - Switch activated when
entrance barrier up M100
E T450
V After 205 the internal relay M100 energised
X102 - Switch activated when
entrance barrier down
N Y201
+24 V M100 X102 Y200
X103 - Switch activated when This results in Y201 energising solenoid B
L car at exit barrier of entrance barrier and barriers comes down
X100
X104 - Switch activated when Y201
car at exit barrier up
X101
X105 - Switch activated when X103 M101 Y203 Y202
Car operated input X103 is required to lift the
X102 car at exit barrier down
exit barrier. Y202 then energises solenoid A
Y200 of exit barrier
Y200 - Solenoid valve A for
X103 entrance barrier Y202
Y201
Y201 - Solenoid valve B for
X104 entrance barrier X104 T451
Input X104 starts timer when barrier up
Y202 Y202 - Solenoid valve A for
X105
Y203 exit barrier M101
T451
Y203 - Solenoid valve B for After 205 the internal relay M101 energised
exit barrier
M101 X105 Y202 Y203
This results in Y203 energising solenoid B
of exit barrier and barrier comes down
Y205

END
So a s
lik
, t wi
e
his tc
m h, ri

Escalator Pass detection switch: 1


at gh

drive Y003 X003


ac t?
ts

Illumination
lamp Y000

Pass detection switch: 0


X001

Pass detection Pass detection


switch: 0 switch: 1
X001 X003
Y000 Illumination lamp ON

Self hold
Y000
Y003 Escalator drive

END
360º
7. 5º

48  10
 1.8 
1800 

 7.5 
1800 
Semester - VII (Mechanical Engineering)
Course 2013


Semester - VII (Mechanical Engineering)
Course 2013

Semester - VII (Mechanical Engineering)


Course 2013


Semester - VII (Mechanical Engineering)
Course 2013

p

Semester - VII (Mechanical Engineering)


Course 2013


Semester - VII (Mechanical Engineering)
Course 2013

360
1.8
5  360 1800
1800
nP
1.8

bt 3 0.025  0.005 3
2.6  10 – 9 m 4
12 12

FL 3 30  0.3 3

3EI 3  200  10 9  2.6  10 – 9

5.19  10 – 4 m 4

x 5.19  10 – 4
F 30

20
100
2
 0.2
10
0.04
0.0104
20
0.0104


10 12

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