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Rajesh S TSK 1

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0% found this document useful (0 votes)
12 views9 pages

Rajesh S TSK 1

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rajeshsr005
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Naan Mudhalvan Assessment - Analog IC Design

Student Name: Rajesh S

College Code & Name: PET ENGG COLLEGE

Analog IC Design : Task 2

Design a NMOS Device with W/L ratio 10 and 200nm AMI Semiconductor's C5 Process
and analyze its I/V characteristics using EDA Tool
A. Design of Schematic and Simulation of IV curves NMOS Device Using EDA Tool

B. Design of Layout and Simulation of IV curves NMOS Device Using Electric EDA
Tool

Part A
 Explain the concept of NMOS Device in analog circuit design
 Learn to create the schematic representation of NMOS Device using the
Electric VLSI EDA Tool.
 Implement DRC to ensure the integrity and correctness of the NMOS Device
design
 Simulate the NMOS Device to analyze its behavior and characteristics under
different input conditions
Part B
Design the layout representation of a NMOS Device using Electric VLSI
EDA tool, co
 Perform DRC, ERC and LVS (Layout vs. Schematic) checks to ensure the
correctness and integrity of the NMOS Device layout
 Conduct simulation on the layout of the NMOS Device to verify its
characteristics under different input conditions

Software Tools: Electric VLSI EDA Tool- Open Source Equivalent EDA tool to
Cadence

NOTE: PART B: The input and output curves are in opposite due to DRAIN &
GATE were reversed.

PART A)

1) a) NMOS SCHEMATIC :
b) OPERATING POINTS ie DC ANALYSIS:

c) SMALL SIGNAL PARAMETERS: LIKE gm,gmb,gds and all parasitic parameters etc
2) a) INPUT CHARACTERISTICS:
2) b) OUTPUT CHARACTERICTICS: .dc Vds 0 5 0.01 Vgs 0 5 1
PART B)

(a) LAYOUT:

(b) DC OPERATING POINTS:


(c) SMALL SIGNAL VALUES AND PARACITIC VALUES:

(d) INPUT CHARACTERITICS:


(e) OUTPUT CHARACTERITICS:
(f) 3D VIEW:

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